linux_dsm_epyc7002/arch/x86/kernel/cpu
Dave Hansen e9f4e0a9fe x86/mm: Rip out complicated, out-of-date, buggy TLB flushing
I think the flush_tlb_mm_range() code that tries to tune the
flush sizes based on the CPU needs to get ripped out for
several reasons:

1. It is obviously buggy.  It uses mm->total_vm to judge the
   task's footprint in the TLB.  It should certainly be using
   some measure of RSS, *NOT* ->total_vm since only resident
   memory can populate the TLB.
2. Haswell, and several other CPUs are missing from the
   intel_tlb_flushall_shift_set() function.  Thus, it has been
   demonstrated to bitrot quickly in practice.
3. It is plain wrong in my vm:
	[    0.037444] Last level iTLB entries: 4KB 0, 2MB 0, 4MB 0
	[    0.037444] Last level dTLB entries: 4KB 0, 2MB 0, 4MB 0
	[    0.037444] tlb_flushall_shift: 6
   Which leads to it to never use invlpg.
4. The assumptions about TLB refill costs are wrong:
	http://lkml.kernel.org/r/1337782555-8088-3-git-send-email-alex.shi@intel.com
    (more on this in later patches)
5. I can not reproduce the original data: https://lkml.org/lkml/2012/5/17/59
   I believe the sample times were too short.  Running the
   benchmark in a loop yields times that vary quite a bit.

Note that this leaves us with a static ceiling of 1 page.  This
is a conservative, dumb setting, and will be revised in a later
patch.

This also removes the code which attempts to predict whether we
are flushing data or instructions.  We expect instruction flushes
to be relatively rare and not worth tuning for explicitly.

Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Link: http://lkml.kernel.org/r/20140731154055.ABC88E89@viggo.jf.intel.com
Acked-by: Rik van Riel <riel@redhat.com>
Acked-by: Mel Gorman <mgorman@suse.de>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2014-07-31 08:48:50 -07:00
..
mcheck hwpoison: remove unused global variable in do_machine_check() 2014-06-04 16:54:11 -07:00
microcode x86, microcode: Add a disable chicken bit 2014-05-20 20:21:27 -07:00
mtrr mm, x86: Account for TLB flushes only when debugging 2014-01-25 09:10:41 +01:00
.gitignore Update .gitignore files for generated targets 2008-10-20 11:24:31 -07:00
amd.c x86/mm: Rip out complicated, out-of-date, buggy TLB flushing 2014-07-31 08:48:50 -07:00
bugs_64.c x86/cpu: Clean up various files a bit 2009-07-11 11:24:09 +02:00
bugs.c x86: Get rid of ->hard_math and all the FPU asm fu 2013-06-06 14:32:04 -07:00
centaur.c x86: Remove CONFIG_X86_OOSTORE 2014-03-11 10:16:18 -07:00
common.c x86/mm: Rip out complicated, out-of-date, buggy TLB flushing 2014-07-31 08:48:50 -07:00
cpu.h x86/cpu: Track legacy CPU model data only on 32-bit kernels 2013-10-26 13:34:39 +02:00
cyrix.c x86: Delete non-required instances of include <linux/init.h> 2014-01-06 21:25:18 -08:00
hypervisor.c x86: Correctly detect hypervisor 2013-08-05 06:35:33 -07:00
intel_cacheinfo.c x86, intel, cacheinfo: Fix CPU hotplug callback registration 2014-03-20 13:43:43 +01:00
intel.c x86/mm: Rip out complicated, out-of-date, buggy TLB flushing 2014-07-31 08:48:50 -07:00
Makefile Merge branch 'x86-microcode-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 2014-01-20 12:07:54 -08:00
match.c x86: align x86 arch with generic CPU modalias handling 2014-02-18 12:45:38 -08:00
mkcapflags.sh mkcapflags.pl: convert to mkcapflags.sh 2013-04-29 15:54:27 -07:00
mshyperv.c Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 2014-04-01 11:22:57 -07:00
perf_event_amd_ibs.c x86, amd, ibs: Fix CPU hotplug callback registration 2014-03-20 13:43:43 +01:00
perf_event_amd_iommu.c perf/x86/amd: Do not print an error when the device is not present 2013-07-05 08:27:15 +02:00
perf_event_amd_iommu.h perf/x86/amd: AMD IOMMU Performance Counter PERF uncore PMU implementation 2013-06-19 13:04:53 +02:00
perf_event_amd_uncore.c x86, amd, uncore: Fix CPU hotplug callback registration 2014-03-20 13:43:43 +01:00
perf_event_amd.c perf: Convert kmalloc_node(...GFP_ZERO...) to kzalloc_node() 2013-09-02 08:42:49 +02:00
perf_event_intel_ds.c fix Haswell precise store data source encoding 2014-05-19 21:52:59 +09:00
perf_event_intel_lbr.c perf: Fix arch_perf_out_copy_user default 2013-11-06 12:34:25 +01:00
perf_event_intel_rapl.c perf/x86: Fix RAPL rdmsrl_safe() usage 2014-04-24 08:12:41 +02:00
perf_event_intel_uncore.c CPU hotplug notifiers registration fixes for 3.15-rc1 2014-04-07 14:55:46 -07:00
perf_event_intel_uncore.h perf/x86/uncore: add hrtimer to SNB uncore IMC PMU 2014-02-21 21:49:08 +01:00
perf_event_intel.c perf/x86/intel: Fix Silvermont's event constraints 2014-05-07 11:33:16 +02:00
perf_event_knc.c x86: Constify a few items 2013-03-11 15:11:03 +01:00
perf_event_p4.c perf/x86/p4: Block PMIs on init to prevent a stream of unkown NMIs 2014-02-09 13:20:35 +01:00
perf_event_p6.c perf/x86/intel/p6: Add userspace RDPMC quirk for PPro 2014-02-09 13:08:24 +01:00
perf_event.c perf/x86: Export perf_assign_events() 2014-04-18 12:54:46 +02:00
perf_event.h perf/x86: Add a few more comments 2014-02-27 12:43:25 +01:00
perfctr-watchdog.c perf/x86: Add support for Intel Xeon-Phi Knights Corner PMU 2012-10-04 13:32:37 +02:00
powerflags.c update AMD powerflags comments 2013-05-28 12:02:10 +02:00
proc.c x86/cpu: Always print SMP information in /proc/cpuinfo 2013-11-06 08:13:56 +01:00
rdrand.c x86, rdrand: When nordrand is specified, disable RDSEED as well 2014-05-11 20:25:20 -07:00
scattered.c treewide: Fix common typo in "identify" 2013-10-14 15:31:06 +02:00
topology.c x86: delete __cpuinit usage from all x86 files 2013-07-14 19:36:56 -04:00
transmeta.c x86: Delete non-required instances of include <linux/init.h> 2014-01-06 21:25:18 -08:00
umc.c x86: Delete non-required instances of include <linux/init.h> 2014-01-06 21:25:18 -08:00
vmware.c x86: Correctly detect hypervisor 2013-08-05 06:35:33 -07:00