mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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4e3f77d841
This is to augment commit 3f5a7896a5
("x86/mce: Include the PPIN in MCE
records when available").
I'm also adding "synd" and "ipid" fields to struct xen_mce, in an
attempt to keep field offsets in sync with struct mce. These two fields
won't get populated for now, though.
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Signed-off-by: Juergen Gross <jgross@suse.com>
392 lines
11 KiB
C
392 lines
11 KiB
C
/******************************************************************************
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* arch-x86/mca.h
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* Guest OS machine check interface to x86 Xen.
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*
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* Contributed by Advanced Micro Devices, Inc.
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* Author: Christoph Egger <Christoph.Egger@amd.com>
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*
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* Updated by Intel Corporation
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* Author: Liu, Jinsong <jinsong.liu@intel.com>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to
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* deal in the Software without restriction, including without limitation the
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* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef __XEN_PUBLIC_ARCH_X86_MCA_H__
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#define __XEN_PUBLIC_ARCH_X86_MCA_H__
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/* Hypercall */
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#define __HYPERVISOR_mca __HYPERVISOR_arch_0
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#define XEN_MCA_INTERFACE_VERSION 0x01ecc003
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/* IN: Dom0 calls hypercall to retrieve nonurgent error log entry */
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#define XEN_MC_NONURGENT 0x1
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/* IN: Dom0 calls hypercall to retrieve urgent error log entry */
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#define XEN_MC_URGENT 0x2
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/* IN: Dom0 acknowledges previosly-fetched error log entry */
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#define XEN_MC_ACK 0x4
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/* OUT: All is ok */
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#define XEN_MC_OK 0x0
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/* OUT: Domain could not fetch data. */
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#define XEN_MC_FETCHFAILED 0x1
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/* OUT: There was no machine check data to fetch. */
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#define XEN_MC_NODATA 0x2
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#ifndef __ASSEMBLY__
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/* vIRQ injected to Dom0 */
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#define VIRQ_MCA VIRQ_ARCH_0
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/*
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* mc_info entry types
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* mca machine check info are recorded in mc_info entries.
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* when fetch mca info, it can use MC_TYPE_... to distinguish
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* different mca info.
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*/
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#define MC_TYPE_GLOBAL 0
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#define MC_TYPE_BANK 1
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#define MC_TYPE_EXTENDED 2
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#define MC_TYPE_RECOVERY 3
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struct mcinfo_common {
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uint16_t type; /* structure type */
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uint16_t size; /* size of this struct in bytes */
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};
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#define MC_FLAG_CORRECTABLE (1 << 0)
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#define MC_FLAG_UNCORRECTABLE (1 << 1)
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#define MC_FLAG_RECOVERABLE (1 << 2)
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#define MC_FLAG_POLLED (1 << 3)
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#define MC_FLAG_RESET (1 << 4)
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#define MC_FLAG_CMCI (1 << 5)
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#define MC_FLAG_MCE (1 << 6)
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/* contains x86 global mc information */
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struct mcinfo_global {
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struct mcinfo_common common;
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uint16_t mc_domid; /* running domain at the time in error */
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uint16_t mc_vcpuid; /* virtual cpu scheduled for mc_domid */
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uint32_t mc_socketid; /* physical socket of the physical core */
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uint16_t mc_coreid; /* physical impacted core */
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uint16_t mc_core_threadid; /* core thread of physical core */
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uint32_t mc_apicid;
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uint32_t mc_flags;
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uint64_t mc_gstatus; /* global status */
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};
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/* contains x86 bank mc information */
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struct mcinfo_bank {
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struct mcinfo_common common;
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uint16_t mc_bank; /* bank nr */
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uint16_t mc_domid; /* domain referenced by mc_addr if valid */
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uint64_t mc_status; /* bank status */
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uint64_t mc_addr; /* bank address */
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uint64_t mc_misc;
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uint64_t mc_ctrl2;
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uint64_t mc_tsc;
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};
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struct mcinfo_msr {
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uint64_t reg; /* MSR */
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uint64_t value; /* MSR value */
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};
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/* contains mc information from other or additional mc MSRs */
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struct mcinfo_extended {
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struct mcinfo_common common;
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uint32_t mc_msrs; /* Number of msr with valid values. */
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/*
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* Currently Intel extended MSR (32/64) include all gp registers
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* and E(R)FLAGS, E(R)IP, E(R)MISC, up to 11/19 of them might be
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* useful at present. So expand this array to 16/32 to leave room.
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*/
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struct mcinfo_msr mc_msr[sizeof(void *) * 4];
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};
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/* Recovery Action flags. Giving recovery result information to DOM0 */
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/* Xen takes successful recovery action, the error is recovered */
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#define REC_ACTION_RECOVERED (0x1 << 0)
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/* No action is performed by XEN */
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#define REC_ACTION_NONE (0x1 << 1)
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/* It's possible DOM0 might take action ownership in some case */
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#define REC_ACTION_NEED_RESET (0x1 << 2)
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/*
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* Different Recovery Action types, if the action is performed successfully,
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* REC_ACTION_RECOVERED flag will be returned.
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*/
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/* Page Offline Action */
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#define MC_ACTION_PAGE_OFFLINE (0x1 << 0)
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/* CPU offline Action */
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#define MC_ACTION_CPU_OFFLINE (0x1 << 1)
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/* L3 cache disable Action */
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#define MC_ACTION_CACHE_SHRINK (0x1 << 2)
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/*
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* Below interface used between XEN/DOM0 for passing XEN's recovery action
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* information to DOM0.
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*/
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struct page_offline_action {
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/* Params for passing the offlined page number to DOM0 */
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uint64_t mfn;
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uint64_t status;
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};
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struct cpu_offline_action {
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/* Params for passing the identity of the offlined CPU to DOM0 */
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uint32_t mc_socketid;
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uint16_t mc_coreid;
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uint16_t mc_core_threadid;
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};
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#define MAX_UNION_SIZE 16
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struct mcinfo_recovery {
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struct mcinfo_common common;
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uint16_t mc_bank; /* bank nr */
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uint8_t action_flags;
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uint8_t action_types;
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union {
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struct page_offline_action page_retire;
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struct cpu_offline_action cpu_offline;
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uint8_t pad[MAX_UNION_SIZE];
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} action_info;
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};
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#define MCINFO_MAXSIZE 768
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struct mc_info {
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/* Number of mcinfo_* entries in mi_data */
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uint32_t mi_nentries;
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uint32_t flags;
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uint64_t mi_data[(MCINFO_MAXSIZE - 1) / 8];
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};
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DEFINE_GUEST_HANDLE_STRUCT(mc_info);
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#define __MC_MSR_ARRAYSIZE 8
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#define __MC_NMSRS 1
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#define MC_NCAPS 7
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struct mcinfo_logical_cpu {
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uint32_t mc_cpunr;
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uint32_t mc_chipid;
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uint16_t mc_coreid;
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uint16_t mc_threadid;
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uint32_t mc_apicid;
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uint32_t mc_clusterid;
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uint32_t mc_ncores;
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uint32_t mc_ncores_active;
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uint32_t mc_nthreads;
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uint32_t mc_cpuid_level;
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uint32_t mc_family;
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uint32_t mc_vendor;
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uint32_t mc_model;
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uint32_t mc_step;
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char mc_vendorid[16];
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char mc_brandid[64];
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uint32_t mc_cpu_caps[MC_NCAPS];
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uint32_t mc_cache_size;
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uint32_t mc_cache_alignment;
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uint32_t mc_nmsrvals;
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struct mcinfo_msr mc_msrvalues[__MC_MSR_ARRAYSIZE];
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};
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DEFINE_GUEST_HANDLE_STRUCT(mcinfo_logical_cpu);
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/*
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* Prototype:
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* uint32_t x86_mcinfo_nentries(struct mc_info *mi);
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*/
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#define x86_mcinfo_nentries(_mi) \
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((_mi)->mi_nentries)
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/*
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* Prototype:
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* struct mcinfo_common *x86_mcinfo_first(struct mc_info *mi);
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*/
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#define x86_mcinfo_first(_mi) \
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((struct mcinfo_common *)(_mi)->mi_data)
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/*
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* Prototype:
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* struct mcinfo_common *x86_mcinfo_next(struct mcinfo_common *mic);
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*/
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#define x86_mcinfo_next(_mic) \
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((struct mcinfo_common *)((uint8_t *)(_mic) + (_mic)->size))
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/*
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* Prototype:
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* void x86_mcinfo_lookup(void *ret, struct mc_info *mi, uint16_t type);
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*/
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static inline void x86_mcinfo_lookup(struct mcinfo_common **ret,
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struct mc_info *mi, uint16_t type)
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{
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uint32_t i;
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struct mcinfo_common *mic;
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bool found = 0;
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if (!ret || !mi)
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return;
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mic = x86_mcinfo_first(mi);
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for (i = 0; i < x86_mcinfo_nentries(mi); i++) {
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if (mic->type == type) {
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found = 1;
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break;
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}
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mic = x86_mcinfo_next(mic);
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}
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*ret = found ? mic : NULL;
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}
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/*
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* Fetch machine check data from hypervisor.
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*/
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#define XEN_MC_fetch 1
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struct xen_mc_fetch {
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/*
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* IN: XEN_MC_NONURGENT, XEN_MC_URGENT,
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* XEN_MC_ACK if ack'king an earlier fetch
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* OUT: XEN_MC_OK, XEN_MC_FETCHAILED, XEN_MC_NODATA
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*/
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uint32_t flags;
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uint32_t _pad0;
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/* OUT: id for ack, IN: id we are ack'ing */
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uint64_t fetch_id;
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/* OUT variables. */
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GUEST_HANDLE(mc_info) data;
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};
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DEFINE_GUEST_HANDLE_STRUCT(xen_mc_fetch);
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/*
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* This tells the hypervisor to notify a DomU about the machine check error
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*/
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#define XEN_MC_notifydomain 2
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struct xen_mc_notifydomain {
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/* IN variables */
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uint16_t mc_domid; /* The unprivileged domain to notify */
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uint16_t mc_vcpuid; /* The vcpu in mc_domid to notify */
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/* IN/OUT variables */
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uint32_t flags;
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};
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DEFINE_GUEST_HANDLE_STRUCT(xen_mc_notifydomain);
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#define XEN_MC_physcpuinfo 3
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struct xen_mc_physcpuinfo {
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/* IN/OUT */
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uint32_t ncpus;
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uint32_t _pad0;
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/* OUT */
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GUEST_HANDLE(mcinfo_logical_cpu) info;
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};
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#define XEN_MC_msrinject 4
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#define MC_MSRINJ_MAXMSRS 8
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struct xen_mc_msrinject {
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/* IN */
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uint32_t mcinj_cpunr; /* target processor id */
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uint32_t mcinj_flags; /* see MC_MSRINJ_F_* below */
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uint32_t mcinj_count; /* 0 .. count-1 in array are valid */
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uint32_t _pad0;
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struct mcinfo_msr mcinj_msr[MC_MSRINJ_MAXMSRS];
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};
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/* Flags for mcinj_flags above; bits 16-31 are reserved */
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#define MC_MSRINJ_F_INTERPOSE 0x1
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#define XEN_MC_mceinject 5
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struct xen_mc_mceinject {
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unsigned int mceinj_cpunr; /* target processor id */
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};
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struct xen_mc {
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uint32_t cmd;
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uint32_t interface_version; /* XEN_MCA_INTERFACE_VERSION */
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union {
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struct xen_mc_fetch mc_fetch;
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struct xen_mc_notifydomain mc_notifydomain;
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struct xen_mc_physcpuinfo mc_physcpuinfo;
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struct xen_mc_msrinject mc_msrinject;
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struct xen_mc_mceinject mc_mceinject;
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} u;
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};
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DEFINE_GUEST_HANDLE_STRUCT(xen_mc);
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/*
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* Fields are zero when not available. Also, this struct is shared with
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* userspace mcelog and thus must keep existing fields at current offsets.
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* Only add new fields to the end of the structure
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*/
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struct xen_mce {
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__u64 status;
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__u64 misc;
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__u64 addr;
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__u64 mcgstatus;
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__u64 ip;
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__u64 tsc; /* cpu time stamp counter */
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__u64 time; /* wall time_t when error was detected */
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__u8 cpuvendor; /* cpu vendor as encoded in system.h */
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__u8 inject_flags; /* software inject flags */
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__u16 pad;
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__u32 cpuid; /* CPUID 1 EAX */
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__u8 cs; /* code segment */
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__u8 bank; /* machine check bank */
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__u8 cpu; /* cpu number; obsolete; use extcpu now */
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__u8 finished; /* entry is valid */
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__u32 extcpu; /* linux cpu number that detected the error */
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__u32 socketid; /* CPU socket ID */
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__u32 apicid; /* CPU initial apic ID */
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__u64 mcgcap; /* MCGCAP MSR: machine check capabilities of CPU */
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__u64 synd; /* MCA_SYND MSR: only valid on SMCA systems */
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__u64 ipid; /* MCA_IPID MSR: only valid on SMCA systems */
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__u64 ppin; /* Protected Processor Inventory Number */
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};
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/*
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* This structure contains all data related to the MCE log. Also
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* carries a signature to make it easier to find from external
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* debugging tools. Each entry is only valid when its finished flag
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* is set.
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*/
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#define XEN_MCE_LOG_LEN 32
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struct xen_mce_log {
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char signature[12]; /* "MACHINECHECK" */
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unsigned len; /* = XEN_MCE_LOG_LEN */
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unsigned next;
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unsigned flags;
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unsigned recordlen; /* length of struct xen_mce */
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struct xen_mce entry[XEN_MCE_LOG_LEN];
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};
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#define XEN_MCE_OVERFLOW 0 /* bit 0 in flags means overflow */
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#define XEN_MCE_LOG_SIGNATURE "MACHINECHECK"
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#define MCE_GET_RECORD_LEN _IOR('M', 1, int)
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#define MCE_GET_LOG_LEN _IOR('M', 2, int)
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#define MCE_GETCLEAR_FLAGS _IOR('M', 3, int)
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#endif /* __ASSEMBLY__ */
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#endif /* __XEN_PUBLIC_ARCH_X86_MCA_H__ */
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