mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-20 11:47:44 +07:00
2cbd4c8185
Reviewed-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
148 lines
3.8 KiB
C
148 lines
3.8 KiB
C
/*
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* Copyright 2010 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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#include "drmP.h"
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#include "nouveau_drv.h"
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#include "nouveau_hw.h"
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static void nv50_gpio_isr(struct drm_device *dev);
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static int
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nv50_gpio_location(struct dcb_gpio_entry *gpio, uint32_t *reg, uint32_t *shift)
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{
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const uint32_t nv50_gpio_reg[4] = { 0xe104, 0xe108, 0xe280, 0xe284 };
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if (gpio->line >= 32)
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return -EINVAL;
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*reg = nv50_gpio_reg[gpio->line >> 3];
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*shift = (gpio->line & 7) << 2;
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return 0;
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}
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int
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nv50_gpio_get(struct drm_device *dev, enum dcb_gpio_tag tag)
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{
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struct dcb_gpio_entry *gpio;
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uint32_t r, s, v;
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gpio = nouveau_bios_gpio_entry(dev, tag);
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if (!gpio)
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return -ENOENT;
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if (nv50_gpio_location(gpio, &r, &s))
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return -EINVAL;
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v = nv_rd32(dev, r) >> (s + 2);
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return ((v & 1) == (gpio->state[1] & 1));
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}
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int
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nv50_gpio_set(struct drm_device *dev, enum dcb_gpio_tag tag, int state)
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{
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struct dcb_gpio_entry *gpio;
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uint32_t r, s, v;
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gpio = nouveau_bios_gpio_entry(dev, tag);
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if (!gpio)
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return -ENOENT;
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if (nv50_gpio_location(gpio, &r, &s))
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return -EINVAL;
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v = nv_rd32(dev, r) & ~(0x3 << s);
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v |= (gpio->state[state] ^ 2) << s;
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nv_wr32(dev, r, v);
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return 0;
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}
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void
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nv50_gpio_irq_enable(struct drm_device *dev, enum dcb_gpio_tag tag, bool on)
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{
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struct dcb_gpio_entry *gpio;
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u32 reg, mask;
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gpio = nouveau_bios_gpio_entry(dev, tag);
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if (!gpio) {
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NV_ERROR(dev, "gpio tag 0x%02x not found\n", tag);
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return;
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}
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reg = gpio->line < 16 ? 0xe050 : 0xe070;
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mask = 0x00010001 << (gpio->line & 0xf);
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nv_wr32(dev, reg + 4, mask);
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nv_mask(dev, reg + 0, mask, on ? mask : 0);
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}
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int
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nv50_gpio_init(struct drm_device *dev)
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{
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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/* disable, and ack any pending gpio interrupts */
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nv_wr32(dev, 0xe050, 0x00000000);
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nv_wr32(dev, 0xe054, 0xffffffff);
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if (dev_priv->chipset >= 0x90) {
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nv_wr32(dev, 0xe070, 0x00000000);
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nv_wr32(dev, 0xe074, 0xffffffff);
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}
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nouveau_irq_register(dev, 21, nv50_gpio_isr);
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return 0;
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}
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void
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nv50_gpio_fini(struct drm_device *dev)
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{
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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nv_wr32(dev, 0xe050, 0x00000000);
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if (dev_priv->chipset >= 0x90)
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nv_wr32(dev, 0xe070, 0x00000000);
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nouveau_irq_unregister(dev, 21);
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}
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static void
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nv50_gpio_isr(struct drm_device *dev)
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{
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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uint32_t hpd0_bits, hpd1_bits = 0;
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hpd0_bits = nv_rd32(dev, 0xe054);
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nv_wr32(dev, 0xe054, hpd0_bits);
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if (dev_priv->chipset >= 0x90) {
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hpd1_bits = nv_rd32(dev, 0xe074);
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nv_wr32(dev, 0xe074, hpd1_bits);
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}
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spin_lock(&dev_priv->hpd_state.lock);
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dev_priv->hpd_state.hpd0_bits |= hpd0_bits;
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dev_priv->hpd_state.hpd1_bits |= hpd1_bits;
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spin_unlock(&dev_priv->hpd_state.lock);
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queue_work(dev_priv->wq, &dev_priv->hpd_work);
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}
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