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0ccc8b7ac8
When reworking the bitops and atomic ops I missed that those instructions that got atomic behaviour only perform a "specific-operand-serialization" instead of a full "serialization". The compare-and-swap instruction used before performs a full serialization before and after the instruction is executed, which means it has full memory barrier semantics. In order to give the new bitops and atomic ops functions also full memory barrier semantics add a "bcr 14,0" before and after each of those new instructions which performs full serialization as well. This restores memory barrier semantics for bitops and atomic ops functions which return values, like e.g. atomic_add_return(), but not for functions which do not return a value, like e.g. atomic_add(). This is consistent to other architectures and what common code requires. Cc: stable@vger.kernel.org # v3.13+ Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
483 lines
12 KiB
C
483 lines
12 KiB
C
/*
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* Copyright IBM Corp. 1999,2013
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*
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* Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>,
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*
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* The description below was taken in large parts from the powerpc
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* bitops header file:
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* Within a word, bits are numbered LSB first. Lot's of places make
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* this assumption by directly testing bits with (val & (1<<nr)).
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* This can cause confusion for large (> 1 word) bitmaps on a
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* big-endian system because, unlike little endian, the number of each
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* bit depends on the word size.
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*
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* The bitop functions are defined to work on unsigned longs, so for an
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* s390x system the bits end up numbered:
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* |63..............0|127............64|191...........128|255...........192|
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* and on s390:
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* |31.....0|63....32|95....64|127...96|159..128|191..160|223..192|255..224|
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*
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* There are a few little-endian macros used mostly for filesystem
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* bitmaps, these work on similar bit arrays layouts, but
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* byte-oriented:
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* |7...0|15...8|23...16|31...24|39...32|47...40|55...48|63...56|
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*
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* The main difference is that bit 3-5 (64b) or 3-4 (32b) in the bit
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* number field needs to be reversed compared to the big-endian bit
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* fields. This can be achieved by XOR with 0x38 (64b) or 0x18 (32b).
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*
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* We also have special functions which work with an MSB0 encoding:
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* on an s390x system the bits are numbered:
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* |0..............63|64............127|128...........191|192...........255|
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* and on s390:
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* |0.....31|32....63|64....95|96...127|128..159|160..191|192..223|224..255|
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*
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* The main difference is that bit 0-63 (64b) or 0-31 (32b) in the bit
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* number field needs to be reversed compared to the LSB0 encoded bit
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* fields. This can be achieved by XOR with 0x3f (64b) or 0x1f (32b).
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*
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*/
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#ifndef _S390_BITOPS_H
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#define _S390_BITOPS_H
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#ifndef _LINUX_BITOPS_H
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#error only <linux/bitops.h> can be included directly
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#endif
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#include <linux/typecheck.h>
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#include <linux/compiler.h>
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#include <asm/barrier.h>
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#define __BITOPS_NO_BARRIER "\n"
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#ifndef CONFIG_64BIT
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#define __BITOPS_OR "or"
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#define __BITOPS_AND "nr"
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#define __BITOPS_XOR "xr"
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#define __BITOPS_BARRIER "\n"
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#define __BITOPS_LOOP(__addr, __val, __op_string, __barrier) \
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({ \
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unsigned long __old, __new; \
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\
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typecheck(unsigned long *, (__addr)); \
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asm volatile( \
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" l %0,%2\n" \
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"0: lr %1,%0\n" \
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__op_string " %1,%3\n" \
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" cs %0,%1,%2\n" \
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" jl 0b" \
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: "=&d" (__old), "=&d" (__new), "+Q" (*(__addr))\
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: "d" (__val) \
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: "cc", "memory"); \
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__old; \
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})
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#else /* CONFIG_64BIT */
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#ifdef CONFIG_HAVE_MARCH_Z196_FEATURES
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#define __BITOPS_OR "laog"
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#define __BITOPS_AND "lang"
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#define __BITOPS_XOR "laxg"
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#define __BITOPS_BARRIER "bcr 14,0\n"
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#define __BITOPS_LOOP(__addr, __val, __op_string, __barrier) \
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({ \
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unsigned long __old; \
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\
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typecheck(unsigned long *, (__addr)); \
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asm volatile( \
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__barrier \
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__op_string " %0,%2,%1\n" \
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__barrier \
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: "=d" (__old), "+Q" (*(__addr)) \
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: "d" (__val) \
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: "cc", "memory"); \
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__old; \
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})
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#else /* CONFIG_HAVE_MARCH_Z196_FEATURES */
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#define __BITOPS_OR "ogr"
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#define __BITOPS_AND "ngr"
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#define __BITOPS_XOR "xgr"
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#define __BITOPS_BARRIER "\n"
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#define __BITOPS_LOOP(__addr, __val, __op_string, __barrier) \
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({ \
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unsigned long __old, __new; \
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\
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typecheck(unsigned long *, (__addr)); \
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asm volatile( \
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" lg %0,%2\n" \
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"0: lgr %1,%0\n" \
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__op_string " %1,%3\n" \
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" csg %0,%1,%2\n" \
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" jl 0b" \
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: "=&d" (__old), "=&d" (__new), "+Q" (*(__addr))\
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: "d" (__val) \
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: "cc", "memory"); \
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__old; \
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})
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#endif /* CONFIG_HAVE_MARCH_Z196_FEATURES */
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#endif /* CONFIG_64BIT */
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#define __BITOPS_WORDS(bits) (((bits) + BITS_PER_LONG - 1) / BITS_PER_LONG)
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static inline unsigned long *
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__bitops_word(unsigned long nr, volatile unsigned long *ptr)
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{
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unsigned long addr;
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addr = (unsigned long)ptr + ((nr ^ (nr & (BITS_PER_LONG - 1))) >> 3);
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return (unsigned long *)addr;
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}
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static inline unsigned char *
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__bitops_byte(unsigned long nr, volatile unsigned long *ptr)
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{
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return ((unsigned char *)ptr) + ((nr ^ (BITS_PER_LONG - 8)) >> 3);
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}
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static inline void set_bit(unsigned long nr, volatile unsigned long *ptr)
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{
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unsigned long *addr = __bitops_word(nr, ptr);
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unsigned long mask;
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#ifdef CONFIG_HAVE_MARCH_ZEC12_FEATURES
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if (__builtin_constant_p(nr)) {
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unsigned char *caddr = __bitops_byte(nr, ptr);
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asm volatile(
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"oi %0,%b1\n"
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: "+Q" (*caddr)
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: "i" (1 << (nr & 7))
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: "cc", "memory");
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return;
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}
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#endif
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mask = 1UL << (nr & (BITS_PER_LONG - 1));
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__BITOPS_LOOP(addr, mask, __BITOPS_OR, __BITOPS_NO_BARRIER);
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}
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static inline void clear_bit(unsigned long nr, volatile unsigned long *ptr)
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{
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unsigned long *addr = __bitops_word(nr, ptr);
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unsigned long mask;
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#ifdef CONFIG_HAVE_MARCH_ZEC12_FEATURES
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if (__builtin_constant_p(nr)) {
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unsigned char *caddr = __bitops_byte(nr, ptr);
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asm volatile(
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"ni %0,%b1\n"
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: "+Q" (*caddr)
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: "i" (~(1 << (nr & 7)))
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: "cc", "memory");
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return;
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}
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#endif
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mask = ~(1UL << (nr & (BITS_PER_LONG - 1)));
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__BITOPS_LOOP(addr, mask, __BITOPS_AND, __BITOPS_NO_BARRIER);
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}
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static inline void change_bit(unsigned long nr, volatile unsigned long *ptr)
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{
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unsigned long *addr = __bitops_word(nr, ptr);
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unsigned long mask;
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#ifdef CONFIG_HAVE_MARCH_ZEC12_FEATURES
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if (__builtin_constant_p(nr)) {
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unsigned char *caddr = __bitops_byte(nr, ptr);
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asm volatile(
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"xi %0,%b1\n"
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: "+Q" (*caddr)
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: "i" (1 << (nr & 7))
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: "cc", "memory");
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return;
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}
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#endif
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mask = 1UL << (nr & (BITS_PER_LONG - 1));
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__BITOPS_LOOP(addr, mask, __BITOPS_XOR, __BITOPS_NO_BARRIER);
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}
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static inline int
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test_and_set_bit(unsigned long nr, volatile unsigned long *ptr)
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{
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unsigned long *addr = __bitops_word(nr, ptr);
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unsigned long old, mask;
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mask = 1UL << (nr & (BITS_PER_LONG - 1));
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old = __BITOPS_LOOP(addr, mask, __BITOPS_OR, __BITOPS_BARRIER);
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return (old & mask) != 0;
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}
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static inline int
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test_and_clear_bit(unsigned long nr, volatile unsigned long *ptr)
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{
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unsigned long *addr = __bitops_word(nr, ptr);
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unsigned long old, mask;
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mask = ~(1UL << (nr & (BITS_PER_LONG - 1)));
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old = __BITOPS_LOOP(addr, mask, __BITOPS_AND, __BITOPS_BARRIER);
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return (old & ~mask) != 0;
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}
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static inline int
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test_and_change_bit(unsigned long nr, volatile unsigned long *ptr)
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{
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unsigned long *addr = __bitops_word(nr, ptr);
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unsigned long old, mask;
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mask = 1UL << (nr & (BITS_PER_LONG - 1));
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old = __BITOPS_LOOP(addr, mask, __BITOPS_XOR, __BITOPS_BARRIER);
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return (old & mask) != 0;
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}
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static inline void __set_bit(unsigned long nr, volatile unsigned long *ptr)
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{
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unsigned char *addr = __bitops_byte(nr, ptr);
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*addr |= 1 << (nr & 7);
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}
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static inline void
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__clear_bit(unsigned long nr, volatile unsigned long *ptr)
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{
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unsigned char *addr = __bitops_byte(nr, ptr);
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*addr &= ~(1 << (nr & 7));
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}
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static inline void __change_bit(unsigned long nr, volatile unsigned long *ptr)
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{
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unsigned char *addr = __bitops_byte(nr, ptr);
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*addr ^= 1 << (nr & 7);
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}
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static inline int
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__test_and_set_bit(unsigned long nr, volatile unsigned long *ptr)
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{
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unsigned char *addr = __bitops_byte(nr, ptr);
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unsigned char ch;
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ch = *addr;
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*addr |= 1 << (nr & 7);
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return (ch >> (nr & 7)) & 1;
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}
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static inline int
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__test_and_clear_bit(unsigned long nr, volatile unsigned long *ptr)
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{
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unsigned char *addr = __bitops_byte(nr, ptr);
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unsigned char ch;
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ch = *addr;
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*addr &= ~(1 << (nr & 7));
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return (ch >> (nr & 7)) & 1;
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}
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static inline int
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__test_and_change_bit(unsigned long nr, volatile unsigned long *ptr)
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{
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unsigned char *addr = __bitops_byte(nr, ptr);
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unsigned char ch;
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ch = *addr;
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*addr ^= 1 << (nr & 7);
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return (ch >> (nr & 7)) & 1;
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}
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static inline int test_bit(unsigned long nr, const volatile unsigned long *ptr)
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{
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const volatile unsigned char *addr;
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addr = ((const volatile unsigned char *)ptr);
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addr += (nr ^ (BITS_PER_LONG - 8)) >> 3;
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return (*addr >> (nr & 7)) & 1;
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}
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/*
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* Functions which use MSB0 bit numbering.
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* On an s390x system the bits are numbered:
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* |0..............63|64............127|128...........191|192...........255|
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* and on s390:
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* |0.....31|32....63|64....95|96...127|128..159|160..191|192..223|224..255|
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*/
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unsigned long find_first_bit_inv(const unsigned long *addr, unsigned long size);
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unsigned long find_next_bit_inv(const unsigned long *addr, unsigned long size,
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unsigned long offset);
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static inline void set_bit_inv(unsigned long nr, volatile unsigned long *ptr)
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{
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return set_bit(nr ^ (BITS_PER_LONG - 1), ptr);
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}
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static inline void clear_bit_inv(unsigned long nr, volatile unsigned long *ptr)
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{
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return clear_bit(nr ^ (BITS_PER_LONG - 1), ptr);
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}
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static inline void __set_bit_inv(unsigned long nr, volatile unsigned long *ptr)
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{
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return __set_bit(nr ^ (BITS_PER_LONG - 1), ptr);
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}
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static inline void __clear_bit_inv(unsigned long nr, volatile unsigned long *ptr)
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{
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return __clear_bit(nr ^ (BITS_PER_LONG - 1), ptr);
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}
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static inline int test_bit_inv(unsigned long nr,
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const volatile unsigned long *ptr)
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{
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return test_bit(nr ^ (BITS_PER_LONG - 1), ptr);
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}
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#ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES
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/**
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* __flogr - find leftmost one
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* @word - The word to search
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*
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* Returns the bit number of the most significant bit set,
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* where the most significant bit has bit number 0.
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* If no bit is set this function returns 64.
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*/
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static inline unsigned char __flogr(unsigned long word)
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{
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if (__builtin_constant_p(word)) {
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unsigned long bit = 0;
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if (!word)
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return 64;
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if (!(word & 0xffffffff00000000UL)) {
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word <<= 32;
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bit += 32;
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}
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if (!(word & 0xffff000000000000UL)) {
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word <<= 16;
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bit += 16;
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}
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if (!(word & 0xff00000000000000UL)) {
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word <<= 8;
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bit += 8;
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}
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if (!(word & 0xf000000000000000UL)) {
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word <<= 4;
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bit += 4;
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}
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if (!(word & 0xc000000000000000UL)) {
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word <<= 2;
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bit += 2;
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}
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if (!(word & 0x8000000000000000UL)) {
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word <<= 1;
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bit += 1;
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}
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return bit;
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} else {
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register unsigned long bit asm("4") = word;
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register unsigned long out asm("5");
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asm volatile(
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" flogr %[bit],%[bit]\n"
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: [bit] "+d" (bit), [out] "=d" (out) : : "cc");
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return bit;
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}
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}
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/**
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* __ffs - find first bit in word.
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* @word: The word to search
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*
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* Undefined if no bit exists, so code should check against 0 first.
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*/
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static inline unsigned long __ffs(unsigned long word)
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{
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return __flogr(-word & word) ^ (BITS_PER_LONG - 1);
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}
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/**
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* ffs - find first bit set
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* @word: the word to search
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*
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* This is defined the same way as the libc and
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* compiler builtin ffs routines (man ffs).
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*/
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static inline int ffs(int word)
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{
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unsigned long mask = 2 * BITS_PER_LONG - 1;
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unsigned int val = (unsigned int)word;
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return (1 + (__flogr(-val & val) ^ (BITS_PER_LONG - 1))) & mask;
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}
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/**
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* __fls - find last (most-significant) set bit in a long word
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* @word: the word to search
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*
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* Undefined if no set bit exists, so code should check against 0 first.
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*/
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static inline unsigned long __fls(unsigned long word)
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{
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return __flogr(word) ^ (BITS_PER_LONG - 1);
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}
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/**
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* fls64 - find last set bit in a 64-bit word
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* @word: the word to search
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*
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* This is defined in a similar way as the libc and compiler builtin
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* ffsll, but returns the position of the most significant set bit.
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*
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* fls64(value) returns 0 if value is 0 or the position of the last
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* set bit if value is nonzero. The last (most significant) bit is
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* at position 64.
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*/
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static inline int fls64(unsigned long word)
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{
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unsigned long mask = 2 * BITS_PER_LONG - 1;
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return (1 + (__flogr(word) ^ (BITS_PER_LONG - 1))) & mask;
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}
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/**
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* fls - find last (most-significant) bit set
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* @word: the word to search
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*
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* This is defined the same way as ffs.
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* Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
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*/
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static inline int fls(int word)
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{
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return fls64((unsigned int)word);
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}
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#else /* CONFIG_HAVE_MARCH_Z9_109_FEATURES */
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#include <asm-generic/bitops/__ffs.h>
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#include <asm-generic/bitops/ffs.h>
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#include <asm-generic/bitops/__fls.h>
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#include <asm-generic/bitops/fls.h>
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#include <asm-generic/bitops/fls64.h>
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#endif /* CONFIG_HAVE_MARCH_Z9_109_FEATURES */
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#include <asm-generic/bitops/ffz.h>
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#include <asm-generic/bitops/find.h>
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#include <asm-generic/bitops/hweight.h>
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#include <asm-generic/bitops/lock.h>
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#include <asm-generic/bitops/sched.h>
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#include <asm-generic/bitops/le.h>
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#include <asm-generic/bitops/ext2-atomic-setbit.h>
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#endif /* _S390_BITOPS_H */
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