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6a5887030a
This patch adds the binding documentation for apmixedsys, bdpsys, ethsys, hifsys, imgsys, infracfg, mmsys, pericfg, topckgen and vdecsys for Mediatek MT2701. Signed-off-by: James Liao <jamesjj.liao@mediatek.com> Signed-off-by: Erin Lo <erin.lo@mediatek.com> Tested-by: John Crispin <blogic@openwrt.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
32 lines
906 B
Plaintext
32 lines
906 B
Plaintext
Mediatek pericfg controller
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===========================
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The Mediatek pericfg controller provides various clocks and reset
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outputs to the system.
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Required Properties:
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- compatible: Should be one of:
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- "mediatek,mt2701-pericfg", "syscon"
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- "mediatek,mt8135-pericfg", "syscon"
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- "mediatek,mt8173-pericfg", "syscon"
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- #clock-cells: Must be 1
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- #reset-cells: Must be 1
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The pericfg controller uses the common clk binding from
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Documentation/devicetree/bindings/clock/clock-bindings.txt
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The available clocks are defined in dt-bindings/clock/mt*-clk.h.
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Also it uses the common reset controller binding from
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Documentation/devicetree/bindings/reset/reset.txt.
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The available reset outputs are defined in
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dt-bindings/reset/mt*-resets.h
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Example:
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pericfg: power-controller@10003000 {
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compatible = "mediatek,mt8173-pericfg", "syscon";
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reg = <0 0x10003000 0 0x1000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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