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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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131 lines
2.9 KiB
C
131 lines
2.9 KiB
C
/*
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* hda_i915.c - routines for Haswell HDA controller power well support
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the Free
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* Software Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software Foundation,
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* Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <sound/core.h>
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#include <drm/i915_powerwell.h>
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#include "hda_priv.h"
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#include "hda_i915.h"
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/* Intel HSW/BDW display HDA controller Extended Mode registers.
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* EM4 (M value) and EM5 (N Value) are used to convert CDClk (Core Display
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* Clock) to 24MHz BCLK: BCLK = CDCLK * M / N
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* The values will be lost when the display power well is disabled.
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*/
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#define AZX_REG_EM4 0x100c
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#define AZX_REG_EM5 0x1010
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static int (*get_power)(void);
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static int (*put_power)(void);
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static int (*get_cdclk)(void);
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int hda_display_power(bool enable)
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{
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if (!get_power || !put_power)
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return -ENODEV;
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pr_debug("HDA display power %s \n",
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enable ? "Enable" : "Disable");
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if (enable)
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return get_power();
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else
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return put_power();
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}
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void haswell_set_bclk(struct azx *chip)
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{
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int cdclk_freq;
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unsigned int bclk_m, bclk_n;
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if (!get_cdclk)
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return;
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cdclk_freq = get_cdclk();
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switch (cdclk_freq) {
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case 337500:
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bclk_m = 16;
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bclk_n = 225;
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break;
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case 450000:
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default: /* default CDCLK 450MHz */
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bclk_m = 4;
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bclk_n = 75;
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break;
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case 540000:
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bclk_m = 4;
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bclk_n = 90;
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break;
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case 675000:
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bclk_m = 8;
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bclk_n = 225;
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break;
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}
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azx_writew(chip, EM4, bclk_m);
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azx_writew(chip, EM5, bclk_n);
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}
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int hda_i915_init(void)
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{
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int err = 0;
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get_power = symbol_request(i915_request_power_well);
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if (!get_power) {
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pr_warn("hda-i915: get_power symbol get fail\n");
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return -ENODEV;
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}
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put_power = symbol_request(i915_release_power_well);
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if (!put_power) {
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symbol_put(i915_request_power_well);
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get_power = NULL;
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return -ENODEV;
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}
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get_cdclk = symbol_request(i915_get_cdclk_freq);
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if (!get_cdclk) /* may have abnormal BCLK and audio playback rate */
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pr_warn("hda-i915: get_cdclk symbol get fail\n");
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pr_debug("HDA driver get symbol successfully from i915 module\n");
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return err;
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}
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int hda_i915_exit(void)
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{
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if (get_power) {
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symbol_put(i915_request_power_well);
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get_power = NULL;
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}
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if (put_power) {
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symbol_put(i915_release_power_well);
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put_power = NULL;
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}
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if (get_cdclk) {
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symbol_put(i915_get_cdclk_freq);
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get_cdclk = NULL;
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}
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return 0;
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}
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