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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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05e152c76a
OMAP5430 is Texas Instrument's SOC based on ARM Cortex-A15 SMP architecture. It's a dual core SOC with GIC used for interrupt handling and with an integrated L2 cache controller. OMAP5432 is another variant of OMAP5430, with a memory controller supporting DDR3 and SATA. Patch includes: - The machine specific headers and sources updates. - Platform header updates. - Minimum initialisation support for serial. - IO table init Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
205 lines
5.2 KiB
C
205 lines
5.2 KiB
C
/*
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* linux/arch/arm/mach-omap2/common.c
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*
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* Code common to all OMAP2+ machines.
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*
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* Copyright (C) 2009 Texas Instruments
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* Copyright (C) 2010 Nokia Corporation
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* Tony Lindgren <tony@atomide.com>
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* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <plat/hardware.h>
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#include <plat/board.h>
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#include <plat/mux.h>
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#include <plat/clock.h>
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#include "iomap.h"
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#include "common.h"
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#include "sdrc.h"
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#include "control.h"
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/* Global address base setup code */
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static void __init __omap2_set_globals(struct omap_globals *omap2_globals)
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{
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omap2_set_globals_tap(omap2_globals);
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omap2_set_globals_sdrc(omap2_globals);
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omap2_set_globals_control(omap2_globals);
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omap2_set_globals_prcm(omap2_globals);
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}
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#if defined(CONFIG_SOC_OMAP2420)
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static struct omap_globals omap242x_globals = {
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.class = OMAP242X_CLASS,
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.tap = OMAP2_L4_IO_ADDRESS(0x48014000),
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.sdrc = OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE),
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.sms = OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE),
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.ctrl = OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE),
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.prm = OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE),
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.cm = OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE),
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};
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void __init omap2_set_globals_242x(void)
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{
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__omap2_set_globals(&omap242x_globals);
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}
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void __init omap242x_map_io(void)
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{
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omap242x_map_common_io();
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}
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#endif
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#if defined(CONFIG_SOC_OMAP2430)
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static struct omap_globals omap243x_globals = {
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.class = OMAP243X_CLASS,
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.tap = OMAP2_L4_IO_ADDRESS(0x4900a000),
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.sdrc = OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE),
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.sms = OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE),
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.ctrl = OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE),
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.prm = OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE),
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.cm = OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE),
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};
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void __init omap2_set_globals_243x(void)
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{
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__omap2_set_globals(&omap243x_globals);
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}
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void __init omap243x_map_io(void)
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{
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omap243x_map_common_io();
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}
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#endif
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#if defined(CONFIG_ARCH_OMAP3)
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static struct omap_globals omap3_globals = {
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.class = OMAP343X_CLASS,
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.tap = OMAP2_L4_IO_ADDRESS(0x4830A000),
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.sdrc = OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE),
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.sms = OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE),
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.ctrl = OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE),
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.prm = OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE),
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.cm = OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE),
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};
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void __init omap2_set_globals_3xxx(void)
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{
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__omap2_set_globals(&omap3_globals);
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}
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void __init omap3_map_io(void)
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{
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omap34xx_map_common_io();
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}
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/*
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* Adjust TAP register base such that omap3_check_revision accesses the correct
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* TI81XX register for checking device ID (it adds 0x204 to tap base while
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* TI81XX DEVICE ID register is at offset 0x600 from control base).
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*/
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#define TI81XX_TAP_BASE (TI81XX_CTRL_BASE + \
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TI81XX_CONTROL_DEVICE_ID - 0x204)
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static struct omap_globals ti81xx_globals = {
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.class = OMAP343X_CLASS,
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.tap = OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE),
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.ctrl = OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
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.prm = OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE),
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.cm = OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE),
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};
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void __init omap2_set_globals_ti81xx(void)
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{
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__omap2_set_globals(&ti81xx_globals);
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}
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void __init ti81xx_map_io(void)
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{
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omapti81xx_map_common_io();
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}
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#endif
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#if defined(CONFIG_SOC_AM33XX)
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#define AM33XX_TAP_BASE (AM33XX_CTRL_BASE + \
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TI81XX_CONTROL_DEVICE_ID - 0x204)
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static struct omap_globals am33xx_globals = {
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.class = AM335X_CLASS,
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.tap = AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE),
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.ctrl = AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE),
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.prm = AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE),
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.cm = AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE),
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};
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void __init omap2_set_globals_am33xx(void)
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{
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__omap2_set_globals(&am33xx_globals);
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}
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void __init am33xx_map_io(void)
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{
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omapam33xx_map_common_io();
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}
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#endif
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#if defined(CONFIG_ARCH_OMAP4)
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static struct omap_globals omap4_globals = {
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.class = OMAP443X_CLASS,
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.tap = OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
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.ctrl = OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
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.ctrl_pad = OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE),
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.prm = OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE),
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.cm = OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
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.cm2 = OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE),
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.prcm_mpu = OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE),
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};
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void __init omap2_set_globals_443x(void)
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{
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__omap2_set_globals(&omap4_globals);
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}
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void __init omap4_map_io(void)
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{
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omap44xx_map_common_io();
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}
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#endif
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#if defined(CONFIG_SOC_OMAP5)
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static struct omap_globals omap5_globals = {
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.class = OMAP54XX_CLASS,
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.tap = OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE),
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.ctrl = OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE),
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.ctrl_pad = OMAP2_L4_IO_ADDRESS(OMAP54XX_CTRL_BASE),
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.prm = OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE),
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.cm = OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_AON_BASE),
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.cm2 = OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE),
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.prcm_mpu = OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE),
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};
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void __init omap2_set_globals_5xxx(void)
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{
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omap2_set_globals_tap(&omap5_globals);
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omap2_set_globals_control(&omap5_globals);
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omap2_set_globals_prcm(&omap5_globals);
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}
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void __init omap5_map_io(void)
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{
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omap5_map_common_io();
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}
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#endif
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