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e20824e944
While the new family-specific compatible values introduced by commit6f54cc1adc("devicetree: bindings: R-Car Gen2 CMT0 and CMT1 bindings") use the recommended order "<vendor>,<family>-<device>", the new SoC-specific compatible values still use the old and deprecated order "<vendor>,<device>-<soc>". Switch the SoC-specific compatible values to the recommended order while there are no upstream users of these compatible values yet. Fixes:7f03a0ecfd("devicetree: bindings: r8a73a4 and R-Car Gen2 CMT bindings") Fixes:63d9e8ca0d("devicetree: bindings: Deprecate property, update example") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
71 lines
2.9 KiB
Plaintext
71 lines
2.9 KiB
Plaintext
* Renesas R-Car Compare Match Timer (CMT)
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The CMT is a multi-channel 16/32/48-bit timer/counter with configurable clock
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inputs and programmable compare match.
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Channels share hardware resources but their counter and compare match value
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are independent. A particular CMT instance can implement only a subset of the
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channels supported by the CMT model. Channel indices represent the hardware
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position of the channel in the CMT and don't match the channel numbers in the
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datasheets.
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Required Properties:
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- compatible: must contain one or more of the following:
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- "renesas,cmt-48-sh73a0" for the sh73A0 48-bit CMT
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(CMT1)
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- "renesas,cmt-48-r8a7740" for the r8a7740 48-bit CMT
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(CMT1)
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- "renesas,cmt-48" for all non-second generation 48-bit CMT
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(CMT1 on sh73a0 and r8a7740)
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This is a fallback for the above renesas,cmt-48-* entries.
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- "renesas,r8a73a4-cmt0" for the 32-bit CMT0 device included in r8a73a4.
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- "renesas,r8a73a4-cmt1" for the 48-bit CMT1 device included in r8a73a4.
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- "renesas,r8a7790-cmt0" for the 32-bit CMT0 device included in r8a7790.
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- "renesas,r8a7790-cmt1" for the 48-bit CMT1 device included in r8a7790.
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- "renesas,r8a7791-cmt0" for the 32-bit CMT0 device included in r8a7791.
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- "renesas,r8a7791-cmt1" for the 48-bit CMT1 device included in r8a7791.
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- "renesas,r8a7793-cmt0" for the 32-bit CMT0 device included in r8a7793.
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- "renesas,r8a7793-cmt1" for the 48-bit CMT1 device included in r8a7793.
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- "renesas,r8a7794-cmt0" for the 32-bit CMT0 device included in r8a7794.
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- "renesas,r8a7794-cmt1" for the 48-bit CMT1 device included in r8a7794.
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- "renesas,rcar-gen2-cmt0" for 32-bit CMT0 devices included in R-Car Gen2.
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- "renesas,rcar-gen2-cmt1" for 48-bit CMT1 devices included in R-Car Gen2.
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These are fallbacks for r8a73a4 and all the R-Car Gen2
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entries listed above.
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- reg: base address and length of the registers block for the timer module.
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- interrupts: interrupt-specifier for the timer, one per channel.
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- clocks: a list of phandle + clock-specifier pairs, one for each entry
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in clock-names.
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- clock-names: must contain "fck" for the functional clock.
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Example: R8A7790 (R-Car H2) CMT0 and CMT1 nodes
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cmt0: timer@ffca0000 {
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compatible = "renesas,r8a7790-cmt0", "renesas,rcar-gen2-cmt0";
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reg = <0 0xffca0000 0 0x1004>;
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interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>,
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<0 142 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp1_clks R8A7790_CLK_CMT0>;
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clock-names = "fck";
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};
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cmt1: timer@e6130000 {
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compatible = "renesas,r8a7790-cmt1", "renesas,rcar-gen2-cmt1";
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reg = <0 0xe6130000 0 0x1004>;
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interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>,
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<0 121 IRQ_TYPE_LEVEL_HIGH>,
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<0 122 IRQ_TYPE_LEVEL_HIGH>,
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<0 123 IRQ_TYPE_LEVEL_HIGH>,
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<0 124 IRQ_TYPE_LEVEL_HIGH>,
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<0 125 IRQ_TYPE_LEVEL_HIGH>,
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<0 126 IRQ_TYPE_LEVEL_HIGH>,
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<0 127 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp3_clks R8A7790_CLK_CMT1>;
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clock-names = "fck";
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};
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