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345 lines
10 KiB
C
345 lines
10 KiB
C
/*
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* This file is part of the Chelsio T6 Crypto driver for Linux.
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*
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* Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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*/
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#ifndef __CHCR_CRYPTO_H__
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#define __CHCR_CRYPTO_H__
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#define GHASH_BLOCK_SIZE 16
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#define GHASH_DIGEST_SIZE 16
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#define CCM_B0_SIZE 16
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#define CCM_AAD_FIELD_SIZE 2
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#define T6_MAX_AAD_SIZE 511
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/* Define following if h/w is not dropping the AAD and IV data before
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* giving the processed data
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*/
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#define CHCR_CRA_PRIORITY 500
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#define CHCR_AEAD_PRIORITY 6000
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#define CHCR_AES_MAX_KEY_LEN (2 * (AES_MAX_KEY_SIZE)) /* consider xts */
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#define CHCR_MAX_CRYPTO_IV_LEN 16 /* AES IV len */
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#define CHCR_MAX_AUTHENC_AES_KEY_LEN 32 /* max aes key length*/
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#define CHCR_MAX_AUTHENC_SHA_KEY_LEN 128 /* max sha key length*/
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#define CHCR_GIVENCRYPT_OP 2
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/* CPL/SCMD parameters */
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#define CHCR_ENCRYPT_OP 0
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#define CHCR_DECRYPT_OP 1
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#define CHCR_SCMD_SEQ_NO_CTRL_32BIT 1
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#define CHCR_SCMD_SEQ_NO_CTRL_48BIT 2
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#define CHCR_SCMD_SEQ_NO_CTRL_64BIT 3
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#define CHCR_SCMD_PROTO_VERSION_GENERIC 4
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#define CHCR_SCMD_AUTH_CTRL_AUTH_CIPHER 0
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#define CHCR_SCMD_AUTH_CTRL_CIPHER_AUTH 1
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#define CHCR_SCMD_CIPHER_MODE_NOP 0
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#define CHCR_SCMD_CIPHER_MODE_AES_CBC 1
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#define CHCR_SCMD_CIPHER_MODE_AES_GCM 2
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#define CHCR_SCMD_CIPHER_MODE_AES_CTR 3
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#define CHCR_SCMD_CIPHER_MODE_GENERIC_AES 4
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#define CHCR_SCMD_CIPHER_MODE_AES_XTS 6
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#define CHCR_SCMD_CIPHER_MODE_AES_CCM 7
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#define CHCR_SCMD_AUTH_MODE_NOP 0
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#define CHCR_SCMD_AUTH_MODE_SHA1 1
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#define CHCR_SCMD_AUTH_MODE_SHA224 2
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#define CHCR_SCMD_AUTH_MODE_SHA256 3
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#define CHCR_SCMD_AUTH_MODE_GHASH 4
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#define CHCR_SCMD_AUTH_MODE_SHA512_224 5
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#define CHCR_SCMD_AUTH_MODE_SHA512_256 6
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#define CHCR_SCMD_AUTH_MODE_SHA512_384 7
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#define CHCR_SCMD_AUTH_MODE_SHA512_512 8
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#define CHCR_SCMD_AUTH_MODE_CBCMAC 9
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#define CHCR_SCMD_AUTH_MODE_CMAC 10
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#define CHCR_SCMD_HMAC_CTRL_NOP 0
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#define CHCR_SCMD_HMAC_CTRL_NO_TRUNC 1
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#define CHCR_SCMD_HMAC_CTRL_TRUNC_RFC4366 2
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#define CHCR_SCMD_HMAC_CTRL_IPSEC_96BIT 3
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#define CHCR_SCMD_HMAC_CTRL_PL1 4
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#define CHCR_SCMD_HMAC_CTRL_PL2 5
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#define CHCR_SCMD_HMAC_CTRL_PL3 6
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#define CHCR_SCMD_HMAC_CTRL_DIV2 7
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#define VERIFY_HW 0
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#define VERIFY_SW 1
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#define CHCR_SCMD_IVGEN_CTRL_HW 0
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#define CHCR_SCMD_IVGEN_CTRL_SW 1
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/* This are not really mac key size. They are intermediate values
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* of sha engine and its size
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*/
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#define CHCR_KEYCTX_MAC_KEY_SIZE_128 0
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#define CHCR_KEYCTX_MAC_KEY_SIZE_160 1
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#define CHCR_KEYCTX_MAC_KEY_SIZE_192 2
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#define CHCR_KEYCTX_MAC_KEY_SIZE_256 3
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#define CHCR_KEYCTX_MAC_KEY_SIZE_512 4
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#define CHCR_KEYCTX_CIPHER_KEY_SIZE_128 0
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#define CHCR_KEYCTX_CIPHER_KEY_SIZE_192 1
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#define CHCR_KEYCTX_CIPHER_KEY_SIZE_256 2
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#define CHCR_KEYCTX_NO_KEY 15
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#define CHCR_CPL_FW4_PLD_IV_OFFSET (5 * 64) /* bytes. flt #5 and #6 */
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#define CHCR_CPL_FW4_PLD_HASH_RESULT_OFFSET (7 * 64) /* bytes. flt #7 */
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#define CHCR_CPL_FW4_PLD_DATA_SIZE (4 * 64) /* bytes. flt #4 to #7 */
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#define KEY_CONTEXT_HDR_SALT_AND_PAD 16
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#define flits_to_bytes(x) (x * 8)
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#define IV_NOP 0
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#define IV_IMMEDIATE 1
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#define IV_DSGL 2
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#define AEAD_H_SIZE 16
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#define CRYPTO_ALG_SUB_TYPE_MASK 0x0f000000
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#define CRYPTO_ALG_SUB_TYPE_HASH_HMAC 0x01000000
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#define CRYPTO_ALG_SUB_TYPE_AEAD_RFC4106 0x02000000
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#define CRYPTO_ALG_SUB_TYPE_AEAD_GCM 0x03000000
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#define CRYPTO_ALG_SUB_TYPE_CBC_SHA 0x04000000
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#define CRYPTO_ALG_SUB_TYPE_AEAD_CCM 0x05000000
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#define CRYPTO_ALG_SUB_TYPE_AEAD_RFC4309 0x06000000
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#define CRYPTO_ALG_SUB_TYPE_CBC_NULL 0x07000000
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#define CRYPTO_ALG_SUB_TYPE_CTR 0x08000000
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#define CRYPTO_ALG_SUB_TYPE_CTR_RFC3686 0x09000000
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#define CRYPTO_ALG_SUB_TYPE_XTS 0x0a000000
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#define CRYPTO_ALG_SUB_TYPE_CBC 0x0b000000
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#define CRYPTO_ALG_SUB_TYPE_CTR_SHA 0x0c000000
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#define CRYPTO_ALG_SUB_TYPE_CTR_NULL 0x0d000000
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#define CRYPTO_ALG_TYPE_HMAC (CRYPTO_ALG_TYPE_AHASH |\
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CRYPTO_ALG_SUB_TYPE_HASH_HMAC)
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#define MAX_SCRATCH_PAD_SIZE 32
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#define CHCR_HASH_MAX_BLOCK_SIZE_64 64
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#define CHCR_HASH_MAX_BLOCK_SIZE_128 128
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#define CHCR_SRC_SG_SIZE (0x10000 - sizeof(int))
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#define CHCR_DST_SG_SIZE 2048
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static inline struct chcr_context *a_ctx(struct crypto_aead *tfm)
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{
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return crypto_aead_ctx(tfm);
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}
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static inline struct chcr_context *c_ctx(struct crypto_ablkcipher *tfm)
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{
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return crypto_ablkcipher_ctx(tfm);
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}
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static inline struct chcr_context *h_ctx(struct crypto_ahash *tfm)
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{
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return crypto_tfm_ctx(crypto_ahash_tfm(tfm));
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}
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struct ablk_ctx {
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struct crypto_sync_skcipher *sw_cipher;
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struct crypto_cipher *aes_generic;
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__be32 key_ctx_hdr;
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unsigned int enckey_len;
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unsigned char ciph_mode;
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u8 key[CHCR_AES_MAX_KEY_LEN];
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u8 nonce[4];
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u8 rrkey[AES_MAX_KEY_SIZE];
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};
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struct chcr_aead_reqctx {
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struct sk_buff *skb;
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dma_addr_t iv_dma;
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dma_addr_t b0_dma;
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unsigned int b0_len;
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unsigned int op;
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short int aad_nents;
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short int src_nents;
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short int dst_nents;
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u16 imm;
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u16 verify;
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u8 iv[CHCR_MAX_CRYPTO_IV_LEN + MAX_SCRATCH_PAD_SIZE];
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u8 *scratch_pad;
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};
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struct ulptx_walk {
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struct ulptx_sgl *sgl;
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unsigned int nents;
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unsigned int pair_idx;
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unsigned int last_sg_len;
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struct scatterlist *last_sg;
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struct ulptx_sge_pair *pair;
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};
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struct dsgl_walk {
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unsigned int nents;
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unsigned int last_sg_len;
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struct scatterlist *last_sg;
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struct cpl_rx_phys_dsgl *dsgl;
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struct phys_sge_pairs *to;
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};
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struct chcr_gcm_ctx {
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u8 ghash_h[AEAD_H_SIZE];
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};
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struct chcr_authenc_ctx {
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u8 dec_rrkey[AES_MAX_KEY_SIZE];
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u8 h_iopad[2 * CHCR_HASH_MAX_DIGEST_SIZE];
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unsigned char auth_mode;
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};
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struct __aead_ctx {
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struct chcr_gcm_ctx gcm[0];
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struct chcr_authenc_ctx authenc[0];
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};
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struct chcr_aead_ctx {
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__be32 key_ctx_hdr;
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unsigned int enckey_len;
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struct crypto_aead *sw_cipher;
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u8 salt[MAX_SALT];
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u8 key[CHCR_AES_MAX_KEY_LEN];
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u8 nonce[4];
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u16 hmac_ctrl;
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u16 mayverify;
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struct __aead_ctx ctx[0];
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};
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struct hmac_ctx {
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struct crypto_shash *base_hash;
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u8 ipad[CHCR_HASH_MAX_BLOCK_SIZE_128];
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u8 opad[CHCR_HASH_MAX_BLOCK_SIZE_128];
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};
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struct __crypto_ctx {
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struct hmac_ctx hmacctx[0];
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struct ablk_ctx ablkctx[0];
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struct chcr_aead_ctx aeadctx[0];
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};
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struct chcr_context {
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struct chcr_dev *dev;
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unsigned char tx_qidx;
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unsigned char rx_qidx;
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unsigned char tx_chan_id;
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unsigned char pci_chan_id;
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struct __crypto_ctx crypto_ctx[0];
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};
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struct chcr_hctx_per_wr {
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struct scatterlist *srcsg;
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struct sk_buff *skb;
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dma_addr_t dma_addr;
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u32 dma_len;
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unsigned int src_ofst;
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unsigned int processed;
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u32 result;
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u8 is_sg_map;
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u8 imm;
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/*Final callback called. Driver cannot rely on nbytes to decide
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* final call
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*/
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u8 isfinal;
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};
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struct chcr_ahash_req_ctx {
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struct chcr_hctx_per_wr hctx_wr;
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u8 *reqbfr;
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u8 *skbfr;
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/* SKB which is being sent to the hardware for processing */
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u64 data_len; /* Data len till time */
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u8 reqlen;
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u8 partial_hash[CHCR_HASH_MAX_DIGEST_SIZE];
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u8 bfr1[CHCR_HASH_MAX_BLOCK_SIZE_128];
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u8 bfr2[CHCR_HASH_MAX_BLOCK_SIZE_128];
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};
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struct chcr_blkcipher_req_ctx {
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struct sk_buff *skb;
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struct scatterlist *dstsg;
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unsigned int processed;
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unsigned int last_req_len;
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struct scatterlist *srcsg;
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unsigned int src_ofst;
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unsigned int dst_ofst;
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unsigned int op;
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u16 imm;
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u8 iv[CHCR_MAX_CRYPTO_IV_LEN];
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};
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struct chcr_alg_template {
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u32 type;
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u32 is_registered;
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union {
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struct crypto_alg crypto;
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struct ahash_alg hash;
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struct aead_alg aead;
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} alg;
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};
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typedef struct sk_buff *(*create_wr_t)(struct aead_request *req,
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unsigned short qid,
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int size);
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void chcr_verify_tag(struct aead_request *req, u8 *input, int *err);
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int chcr_aead_dma_map(struct device *dev, struct aead_request *req,
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unsigned short op_type);
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void chcr_aead_dma_unmap(struct device *dev, struct aead_request *req,
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unsigned short op_type);
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void chcr_add_aead_dst_ent(struct aead_request *req,
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struct cpl_rx_phys_dsgl *phys_cpl,
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unsigned int assoclen,
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unsigned short qid);
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void chcr_add_aead_src_ent(struct aead_request *req, struct ulptx_sgl *ulptx,
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unsigned int assoclen);
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void chcr_add_cipher_src_ent(struct ablkcipher_request *req,
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void *ulptx,
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struct cipher_wr_param *wrparam);
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int chcr_cipher_dma_map(struct device *dev, struct ablkcipher_request *req);
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void chcr_cipher_dma_unmap(struct device *dev, struct ablkcipher_request *req);
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void chcr_add_cipher_dst_ent(struct ablkcipher_request *req,
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struct cpl_rx_phys_dsgl *phys_cpl,
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struct cipher_wr_param *wrparam,
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unsigned short qid);
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int sg_nents_len_skip(struct scatterlist *sg, u64 len, u64 skip);
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void chcr_add_hash_src_ent(struct ahash_request *req, struct ulptx_sgl *ulptx,
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struct hash_wr_param *param);
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int chcr_hash_dma_map(struct device *dev, struct ahash_request *req);
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void chcr_hash_dma_unmap(struct device *dev, struct ahash_request *req);
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void chcr_aead_common_exit(struct aead_request *req);
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#endif /* __CHCR_CRYPTO_H__ */
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