mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
5ef438c854
con_init in tty/vt.c will now set conswitchp to dummy_con if it's unset. Drop it from arch setup code. Signed-off-by: Arvind Sankar <nivedita@alum.mit.edu> Link: https://lore.kernel.org/r/20191218214506.49252-23-nivedita@alum.mit.edu Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
353 lines
7.5 KiB
C
353 lines
7.5 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* linux/arch/unicore32/kernel/setup.c
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*
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* Code specific to PKUnity SoC and UniCore ISA
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*
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* Copyright (C) 2001-2010 GUAN Xue-tao
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/stddef.h>
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#include <linux/ioport.h>
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#include <linux/delay.h>
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#include <linux/utsname.h>
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#include <linux/initrd.h>
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#include <linux/console.h>
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#include <linux/memblock.h>
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#include <linux/seq_file.h>
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#include <linux/screen_info.h>
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#include <linux/init.h>
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#include <linux/root_dev.h>
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#include <linux/cpu.h>
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#include <linux/interrupt.h>
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#include <linux/smp.h>
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#include <linux/fs.h>
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#include <linux/proc_fs.h>
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#include <linux/elf.h>
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#include <linux/io.h>
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#include <asm/cputype.h>
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#include <asm/sections.h>
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#include <asm/setup.h>
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#include <asm/cacheflush.h>
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#include <asm/tlbflush.h>
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#include <asm/traps.h>
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#include <asm/memblock.h>
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#include "setup.h"
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#ifndef MEM_SIZE
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#define MEM_SIZE (16*1024*1024)
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#endif
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struct stack {
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u32 irq[3];
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u32 abt[3];
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u32 und[3];
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} ____cacheline_aligned;
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static struct stack stacks[NR_CPUS];
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#ifdef CONFIG_VGA_CONSOLE
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struct screen_info screen_info;
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#endif
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char elf_platform[ELF_PLATFORM_SIZE];
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EXPORT_SYMBOL(elf_platform);
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static char __initdata cmd_line[COMMAND_LINE_SIZE];
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static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
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/*
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* Standard memory resources
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*/
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static struct resource mem_res[] = {
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{
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.name = "Kernel code",
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.start = 0,
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.end = 0,
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.flags = IORESOURCE_SYSTEM_RAM
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},
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{
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.name = "Kernel data",
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.start = 0,
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.end = 0,
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.flags = IORESOURCE_SYSTEM_RAM
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}
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};
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#define kernel_code mem_res[0]
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#define kernel_data mem_res[1]
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/*
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* These functions re-use the assembly code in head.S, which
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* already provide the required functionality.
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*/
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static void __init setup_processor(void)
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{
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printk(KERN_DEFAULT "CPU: UniCore-II [%08x] revision %d, cr=%08lx\n",
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uc32_cpuid, (int)(uc32_cpuid >> 16) & 15, cr_alignment);
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sprintf(init_utsname()->machine, "puv3");
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sprintf(elf_platform, "ucv2");
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}
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/*
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* cpu_init - initialise one CPU.
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*
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* cpu_init sets up the per-CPU stacks.
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*/
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void cpu_init(void)
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{
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unsigned int cpu = smp_processor_id();
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struct stack *stk = &stacks[cpu];
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/*
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* setup stacks for re-entrant exception handlers
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*/
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__asm__ (
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"mov.a asr, %1\n\t"
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"add sp, %0, %2\n\t"
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"mov.a asr, %3\n\t"
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"add sp, %0, %4\n\t"
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"mov.a asr, %5\n\t"
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"add sp, %0, %6\n\t"
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"mov.a asr, %7"
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:
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: "r" (stk),
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"r" (PSR_R_BIT | PSR_I_BIT | INTR_MODE),
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"I" (offsetof(struct stack, irq[0])),
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"r" (PSR_R_BIT | PSR_I_BIT | ABRT_MODE),
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"I" (offsetof(struct stack, abt[0])),
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"r" (PSR_R_BIT | PSR_I_BIT | EXTN_MODE),
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"I" (offsetof(struct stack, und[0])),
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"r" (PSR_R_BIT | PSR_I_BIT | PRIV_MODE)
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: "r30", "cc");
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}
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static int __init uc32_add_memory(unsigned long start, unsigned long size)
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{
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struct membank *bank = &meminfo.bank[meminfo.nr_banks];
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if (meminfo.nr_banks >= NR_BANKS) {
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printk(KERN_CRIT "NR_BANKS too low, "
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"ignoring memory at %#lx\n", start);
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return -EINVAL;
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}
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/*
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* Ensure that start/size are aligned to a page boundary.
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* Size is appropriately rounded down, start is rounded up.
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*/
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size -= start & ~PAGE_MASK;
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bank->start = PAGE_ALIGN(start);
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bank->size = size & PAGE_MASK;
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/*
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* Check whether this memory region has non-zero size or
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* invalid node number.
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*/
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if (bank->size == 0)
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return -EINVAL;
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meminfo.nr_banks++;
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return 0;
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}
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/*
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* Pick out the memory size. We look for mem=size@start,
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* where start and size are "size[KkMm]"
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*/
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static int __init early_mem(char *p)
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{
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static int usermem __initdata = 1;
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unsigned long size, start;
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char *endp;
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/*
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* If the user specifies memory size, we
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* blow away any automatically generated
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* size.
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*/
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if (usermem) {
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usermem = 0;
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meminfo.nr_banks = 0;
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}
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start = PHYS_OFFSET;
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size = memparse(p, &endp);
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if (*endp == '@')
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start = memparse(endp + 1, NULL);
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uc32_add_memory(start, size);
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return 0;
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}
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early_param("mem", early_mem);
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static void __init
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request_standard_resources(struct meminfo *mi)
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{
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struct resource *res;
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int i;
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kernel_code.start = virt_to_phys(_stext);
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kernel_code.end = virt_to_phys(_etext - 1);
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kernel_data.start = virt_to_phys(_sdata);
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kernel_data.end = virt_to_phys(_end - 1);
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for (i = 0; i < mi->nr_banks; i++) {
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if (mi->bank[i].size == 0)
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continue;
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res = memblock_alloc_low(sizeof(*res), SMP_CACHE_BYTES);
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if (!res)
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panic("%s: Failed to allocate %zu bytes align=%x\n",
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__func__, sizeof(*res), SMP_CACHE_BYTES);
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res->name = "System RAM";
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res->start = mi->bank[i].start;
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res->end = mi->bank[i].start + mi->bank[i].size - 1;
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res->flags = IORESOURCE_SYSTEM_RAM | IORESOURCE_BUSY;
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request_resource(&iomem_resource, res);
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if (kernel_code.start >= res->start &&
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kernel_code.end <= res->end)
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request_resource(res, &kernel_code);
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if (kernel_data.start >= res->start &&
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kernel_data.end <= res->end)
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request_resource(res, &kernel_data);
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}
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}
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static void (*init_machine)(void) __initdata;
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static int __init customize_machine(void)
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{
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/* customizes platform devices, or adds new ones */
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if (init_machine)
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init_machine();
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return 0;
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}
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arch_initcall(customize_machine);
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void __init setup_arch(char **cmdline_p)
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{
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char *from = default_command_line;
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setup_processor();
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init_mm.start_code = (unsigned long) _stext;
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init_mm.end_code = (unsigned long) _etext;
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init_mm.end_data = (unsigned long) _edata;
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init_mm.brk = (unsigned long) _end;
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/* parse_early_param needs a boot_command_line */
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strlcpy(boot_command_line, from, COMMAND_LINE_SIZE);
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/* populate cmd_line too for later use, preserving boot_command_line */
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strlcpy(cmd_line, boot_command_line, COMMAND_LINE_SIZE);
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*cmdline_p = cmd_line;
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parse_early_param();
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uc32_memblock_init(&meminfo);
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paging_init();
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request_standard_resources(&meminfo);
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cpu_init();
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/*
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* Set up various architecture-specific pointers
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*/
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init_machine = puv3_core_init;
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#ifdef CONFIG_VT
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#if defined(CONFIG_VGA_CONSOLE)
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conswitchp = &vga_con;
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#endif
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#endif
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early_trap_init();
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}
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static struct cpu cpuinfo_unicore;
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static int __init topology_init(void)
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{
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int i;
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for_each_possible_cpu(i)
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register_cpu(&cpuinfo_unicore, i);
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return 0;
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}
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subsys_initcall(topology_init);
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#ifdef CONFIG_HAVE_PROC_CPU
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static int __init proc_cpu_init(void)
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{
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struct proc_dir_entry *res;
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res = proc_mkdir("cpu", NULL);
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if (!res)
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return -ENOMEM;
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return 0;
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}
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fs_initcall(proc_cpu_init);
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#endif
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static int c_show(struct seq_file *m, void *v)
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{
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seq_printf(m, "Processor\t: UniCore-II rev %d (%s)\n",
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(int)(uc32_cpuid >> 16) & 15, elf_platform);
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seq_printf(m, "BogoMIPS\t: %lu.%02lu\n",
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loops_per_jiffy / (500000/HZ),
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(loops_per_jiffy / (5000/HZ)) % 100);
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/* dump out the processor features */
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seq_puts(m, "Features\t: CMOV UC-F64");
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seq_printf(m, "\nCPU implementer\t: 0x%02x\n", uc32_cpuid >> 24);
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seq_printf(m, "CPU architecture: 2\n");
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seq_printf(m, "CPU revision\t: %d\n", (uc32_cpuid >> 16) & 15);
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seq_printf(m, "Cache type\t: write-back\n"
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"Cache clean\t: cp0 c5 ops\n"
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"Cache lockdown\t: not support\n"
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"Cache format\t: Harvard\n");
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seq_puts(m, "\n");
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seq_printf(m, "Hardware\t: PKUnity v3\n");
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return 0;
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}
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static void *c_start(struct seq_file *m, loff_t *pos)
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{
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return *pos < 1 ? (void *)1 : NULL;
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}
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static void *c_next(struct seq_file *m, void *v, loff_t *pos)
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{
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++*pos;
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return NULL;
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}
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static void c_stop(struct seq_file *m, void *v)
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{
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}
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const struct seq_operations cpuinfo_op = {
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.start = c_start,
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.next = c_next,
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.stop = c_stop,
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.show = c_show
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};
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