mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-24 12:15:35 +07:00
fee10bd226
Add driver for arm pl353 static memory controller. This controller is used in Xilinx Zynq SoC for interfacing the NAND and NOR/SRAM memory devices. Signed-off-by: Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
31 lines
739 B
C
31 lines
739 B
C
/* SPDX-License-Identifier: GPL-2.0 */
|
|
/*
|
|
* ARM PL353 SMC Driver Header
|
|
*
|
|
* Copyright (C) 2012 - 2018 Xilinx, Inc
|
|
*/
|
|
|
|
#ifndef __LINUX_PL353_SMC_H
|
|
#define __LINUX_PL353_SMC_H
|
|
|
|
enum pl353_smc_ecc_mode {
|
|
PL353_SMC_ECCMODE_BYPASS = 0,
|
|
PL353_SMC_ECCMODE_APB = 1,
|
|
PL353_SMC_ECCMODE_MEM = 2
|
|
};
|
|
|
|
enum pl353_smc_mem_width {
|
|
PL353_SMC_MEM_WIDTH_8 = 0,
|
|
PL353_SMC_MEM_WIDTH_16 = 1
|
|
};
|
|
|
|
u32 pl353_smc_get_ecc_val(int ecc_reg);
|
|
bool pl353_smc_ecc_is_busy(void);
|
|
int pl353_smc_get_nand_int_status_raw(void);
|
|
void pl353_smc_clr_nand_int(void);
|
|
int pl353_smc_set_ecc_mode(enum pl353_smc_ecc_mode mode);
|
|
int pl353_smc_set_ecc_pg_size(unsigned int pg_sz);
|
|
int pl353_smc_set_buswidth(unsigned int bw);
|
|
void pl353_smc_set_cycles(u32 timings[]);
|
|
#endif
|