mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-24 14:20:55 +07:00
61dba73cdb
It's another SoC with 32 GPIOs and simplified watchdog handling. It was tested on D-Link DIR-885L. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
489 lines
15 KiB
C
489 lines
15 KiB
C
#ifndef LINUX_BCMA_H_
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#define LINUX_BCMA_H_
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#include <linux/pci.h>
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#include <linux/mod_devicetable.h>
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#include <linux/bcma/bcma_driver_chipcommon.h>
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#include <linux/bcma/bcma_driver_pci.h>
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#include <linux/bcma/bcma_driver_pcie2.h>
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#include <linux/bcma/bcma_driver_mips.h>
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#include <linux/bcma/bcma_driver_gmac_cmn.h>
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#include <linux/ssb/ssb.h> /* SPROM sharing */
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#include <linux/bcma/bcma_regs.h>
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struct bcma_device;
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struct bcma_bus;
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enum bcma_hosttype {
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BCMA_HOSTTYPE_PCI,
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BCMA_HOSTTYPE_SDIO,
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BCMA_HOSTTYPE_SOC,
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};
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struct bcma_chipinfo {
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u16 id;
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u8 rev;
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u8 pkg;
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};
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struct bcma_boardinfo {
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u16 vendor;
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u16 type;
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};
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enum bcma_clkmode {
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BCMA_CLKMODE_FAST,
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BCMA_CLKMODE_DYNAMIC,
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};
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struct bcma_host_ops {
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u8 (*read8)(struct bcma_device *core, u16 offset);
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u16 (*read16)(struct bcma_device *core, u16 offset);
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u32 (*read32)(struct bcma_device *core, u16 offset);
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void (*write8)(struct bcma_device *core, u16 offset, u8 value);
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void (*write16)(struct bcma_device *core, u16 offset, u16 value);
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void (*write32)(struct bcma_device *core, u16 offset, u32 value);
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#ifdef CONFIG_BCMA_BLOCKIO
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void (*block_read)(struct bcma_device *core, void *buffer,
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size_t count, u16 offset, u8 reg_width);
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void (*block_write)(struct bcma_device *core, const void *buffer,
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size_t count, u16 offset, u8 reg_width);
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#endif
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/* Agent ops */
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u32 (*aread32)(struct bcma_device *core, u16 offset);
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void (*awrite32)(struct bcma_device *core, u16 offset, u32 value);
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};
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/* Core manufacturers */
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#define BCMA_MANUF_ARM 0x43B
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#define BCMA_MANUF_MIPS 0x4A7
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#define BCMA_MANUF_BCM 0x4BF
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/* Core class values. */
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#define BCMA_CL_SIM 0x0
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#define BCMA_CL_EROM 0x1
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#define BCMA_CL_CORESIGHT 0x9
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#define BCMA_CL_VERIF 0xB
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#define BCMA_CL_OPTIMO 0xD
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#define BCMA_CL_GEN 0xE
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#define BCMA_CL_PRIMECELL 0xF
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/* Core-ID values. */
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#define BCMA_CORE_OOB_ROUTER 0x367 /* Out of band */
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#define BCMA_CORE_4706_CHIPCOMMON 0x500
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#define BCMA_CORE_NS_PCIEG2 0x501
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#define BCMA_CORE_NS_DMA 0x502
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#define BCMA_CORE_NS_SDIO3 0x503
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#define BCMA_CORE_NS_USB20 0x504
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#define BCMA_CORE_NS_USB30 0x505
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#define BCMA_CORE_NS_A9JTAG 0x506
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#define BCMA_CORE_NS_DDR23 0x507
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#define BCMA_CORE_NS_ROM 0x508
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#define BCMA_CORE_NS_NAND 0x509
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#define BCMA_CORE_NS_QSPI 0x50A
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#define BCMA_CORE_NS_CHIPCOMMON_B 0x50B
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#define BCMA_CORE_4706_SOC_RAM 0x50E
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#define BCMA_CORE_ARMCA9 0x510
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#define BCMA_CORE_4706_MAC_GBIT 0x52D
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#define BCMA_CORE_AMEMC 0x52E /* DDR1/2 memory controller core */
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#define BCMA_CORE_ALTA 0x534 /* I2S core */
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#define BCMA_CORE_4706_MAC_GBIT_COMMON 0x5DC
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#define BCMA_CORE_DDR23_PHY 0x5DD
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#define BCMA_CORE_INVALID 0x700
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#define BCMA_CORE_CHIPCOMMON 0x800
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#define BCMA_CORE_ILINE20 0x801
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#define BCMA_CORE_SRAM 0x802
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#define BCMA_CORE_SDRAM 0x803
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#define BCMA_CORE_PCI 0x804
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#define BCMA_CORE_MIPS 0x805
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#define BCMA_CORE_ETHERNET 0x806
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#define BCMA_CORE_V90 0x807
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#define BCMA_CORE_USB11_HOSTDEV 0x808
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#define BCMA_CORE_ADSL 0x809
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#define BCMA_CORE_ILINE100 0x80A
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#define BCMA_CORE_IPSEC 0x80B
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#define BCMA_CORE_UTOPIA 0x80C
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#define BCMA_CORE_PCMCIA 0x80D
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#define BCMA_CORE_INTERNAL_MEM 0x80E
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#define BCMA_CORE_MEMC_SDRAM 0x80F
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#define BCMA_CORE_OFDM 0x810
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#define BCMA_CORE_EXTIF 0x811
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#define BCMA_CORE_80211 0x812
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#define BCMA_CORE_PHY_A 0x813
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#define BCMA_CORE_PHY_B 0x814
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#define BCMA_CORE_PHY_G 0x815
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#define BCMA_CORE_MIPS_3302 0x816
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#define BCMA_CORE_USB11_HOST 0x817
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#define BCMA_CORE_USB11_DEV 0x818
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#define BCMA_CORE_USB20_HOST 0x819
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#define BCMA_CORE_USB20_DEV 0x81A
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#define BCMA_CORE_SDIO_HOST 0x81B
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#define BCMA_CORE_ROBOSWITCH 0x81C
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#define BCMA_CORE_PARA_ATA 0x81D
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#define BCMA_CORE_SATA_XORDMA 0x81E
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#define BCMA_CORE_ETHERNET_GBIT 0x81F
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#define BCMA_CORE_PCIE 0x820
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#define BCMA_CORE_PHY_N 0x821
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#define BCMA_CORE_SRAM_CTL 0x822
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#define BCMA_CORE_MINI_MACPHY 0x823
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#define BCMA_CORE_ARM_1176 0x824
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#define BCMA_CORE_ARM_7TDMI 0x825
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#define BCMA_CORE_PHY_LP 0x826
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#define BCMA_CORE_PMU 0x827
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#define BCMA_CORE_PHY_SSN 0x828
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#define BCMA_CORE_SDIO_DEV 0x829
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#define BCMA_CORE_ARM_CM3 0x82A
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#define BCMA_CORE_PHY_HT 0x82B
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#define BCMA_CORE_MIPS_74K 0x82C
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#define BCMA_CORE_MAC_GBIT 0x82D
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#define BCMA_CORE_DDR12_MEM_CTL 0x82E
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#define BCMA_CORE_PCIE_RC 0x82F /* PCIe Root Complex */
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#define BCMA_CORE_OCP_OCP_BRIDGE 0x830
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#define BCMA_CORE_SHARED_COMMON 0x831
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#define BCMA_CORE_OCP_AHB_BRIDGE 0x832
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#define BCMA_CORE_SPI_HOST 0x833
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#define BCMA_CORE_I2S 0x834
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#define BCMA_CORE_SDR_DDR1_MEM_CTL 0x835 /* SDR/DDR1 memory controller core */
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#define BCMA_CORE_SHIM 0x837 /* SHIM component in ubus/6362 */
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#define BCMA_CORE_PHY_AC 0x83B
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#define BCMA_CORE_PCIE2 0x83C /* PCI Express Gen2 */
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#define BCMA_CORE_USB30_DEV 0x83D
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#define BCMA_CORE_ARM_CR4 0x83E
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#define BCMA_CORE_GCI 0x840
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#define BCMA_CORE_CMEM 0x846 /* CNDS DDR2/3 memory controller */
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#define BCMA_CORE_ARM_CA7 0x847
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#define BCMA_CORE_SYS_MEM 0x849
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#define BCMA_CORE_DEFAULT 0xFFF
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#define BCMA_MAX_NR_CORES 16
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/* Chip IDs of PCIe devices */
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#define BCMA_CHIP_ID_BCM4313 0x4313
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#define BCMA_CHIP_ID_BCM43142 43142
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#define BCMA_CHIP_ID_BCM43131 43131
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#define BCMA_CHIP_ID_BCM43217 43217
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#define BCMA_CHIP_ID_BCM43222 43222
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#define BCMA_CHIP_ID_BCM43224 43224
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#define BCMA_PKG_ID_BCM43224_FAB_CSM 0x8
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#define BCMA_PKG_ID_BCM43224_FAB_SMIC 0xa
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#define BCMA_CHIP_ID_BCM43225 43225
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#define BCMA_CHIP_ID_BCM43227 43227
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#define BCMA_CHIP_ID_BCM43228 43228
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#define BCMA_CHIP_ID_BCM43421 43421
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#define BCMA_CHIP_ID_BCM43428 43428
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#define BCMA_CHIP_ID_BCM43431 43431
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#define BCMA_CHIP_ID_BCM43460 43460
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#define BCMA_CHIP_ID_BCM4331 0x4331
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#define BCMA_CHIP_ID_BCM6362 0x6362
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#define BCMA_CHIP_ID_BCM4360 0x4360
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#define BCMA_CHIP_ID_BCM4352 0x4352
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/* Chip IDs of SoCs */
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#define BCMA_CHIP_ID_BCM4706 0x5300
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#define BCMA_PKG_ID_BCM4706L 1
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#define BCMA_CHIP_ID_BCM4716 0x4716
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#define BCMA_PKG_ID_BCM4716 8
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#define BCMA_PKG_ID_BCM4717 9
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#define BCMA_PKG_ID_BCM4718 10
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#define BCMA_CHIP_ID_BCM47162 47162
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#define BCMA_CHIP_ID_BCM4748 0x4748
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#define BCMA_CHIP_ID_BCM4749 0x4749
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#define BCMA_CHIP_ID_BCM5356 0x5356
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#define BCMA_CHIP_ID_BCM5357 0x5357
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#define BCMA_PKG_ID_BCM5358 9
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#define BCMA_PKG_ID_BCM47186 10
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#define BCMA_PKG_ID_BCM5357 11
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#define BCMA_CHIP_ID_BCM53572 53572
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#define BCMA_PKG_ID_BCM47188 9
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#define BCMA_CHIP_ID_BCM4707 53010
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#define BCMA_PKG_ID_BCM4707 1
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#define BCMA_PKG_ID_BCM4708 2
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#define BCMA_PKG_ID_BCM4709 0
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#define BCMA_CHIP_ID_BCM47094 53030
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#define BCMA_CHIP_ID_BCM53018 53018
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/* Board types (on PCI usually equals to the subsystem dev id) */
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/* BCM4313 */
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#define BCMA_BOARD_TYPE_BCM94313BU 0X050F
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#define BCMA_BOARD_TYPE_BCM94313HM 0X0510
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#define BCMA_BOARD_TYPE_BCM94313EPA 0X0511
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#define BCMA_BOARD_TYPE_BCM94313HMG 0X051C
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/* BCM4716 */
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#define BCMA_BOARD_TYPE_BCM94716NR2 0X04CD
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/* BCM43224 */
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#define BCMA_BOARD_TYPE_BCM943224X21 0X056E
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#define BCMA_BOARD_TYPE_BCM943224X21_FCC 0X00D1
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#define BCMA_BOARD_TYPE_BCM943224X21B 0X00E9
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#define BCMA_BOARD_TYPE_BCM943224M93 0X008B
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#define BCMA_BOARD_TYPE_BCM943224M93A 0X0090
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#define BCMA_BOARD_TYPE_BCM943224X16 0X0093
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#define BCMA_BOARD_TYPE_BCM94322X9 0X008D
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#define BCMA_BOARD_TYPE_BCM94322M35E 0X008E
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/* BCM43228 */
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#define BCMA_BOARD_TYPE_BCM943228BU8 0X0540
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#define BCMA_BOARD_TYPE_BCM943228BU9 0X0541
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#define BCMA_BOARD_TYPE_BCM943228BU 0X0542
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#define BCMA_BOARD_TYPE_BCM943227HM4L 0X0543
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#define BCMA_BOARD_TYPE_BCM943227HMB 0X0544
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#define BCMA_BOARD_TYPE_BCM943228HM4L 0X0545
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#define BCMA_BOARD_TYPE_BCM943228SD 0X0573
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/* BCM4331 */
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#define BCMA_BOARD_TYPE_BCM94331X19 0X00D6
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#define BCMA_BOARD_TYPE_BCM94331X28 0X00E4
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#define BCMA_BOARD_TYPE_BCM94331X28B 0X010E
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#define BCMA_BOARD_TYPE_BCM94331PCIEBT3AX 0X00E4
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#define BCMA_BOARD_TYPE_BCM94331X12_2G 0X00EC
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#define BCMA_BOARD_TYPE_BCM94331X12_5G 0X00ED
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#define BCMA_BOARD_TYPE_BCM94331X29B 0X00EF
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#define BCMA_BOARD_TYPE_BCM94331CSAX 0X00EF
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#define BCMA_BOARD_TYPE_BCM94331X19C 0X00F5
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#define BCMA_BOARD_TYPE_BCM94331X33 0X00F4
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#define BCMA_BOARD_TYPE_BCM94331BU 0X0523
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#define BCMA_BOARD_TYPE_BCM94331S9BU 0X0524
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#define BCMA_BOARD_TYPE_BCM94331MC 0X0525
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#define BCMA_BOARD_TYPE_BCM94331MCI 0X0526
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#define BCMA_BOARD_TYPE_BCM94331PCIEBT4 0X0527
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#define BCMA_BOARD_TYPE_BCM94331HM 0X0574
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#define BCMA_BOARD_TYPE_BCM94331PCIEDUAL 0X059B
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#define BCMA_BOARD_TYPE_BCM94331MCH5 0X05A9
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#define BCMA_BOARD_TYPE_BCM94331CS 0X05C6
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#define BCMA_BOARD_TYPE_BCM94331CD 0X05DA
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/* BCM53572 */
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#define BCMA_BOARD_TYPE_BCM953572BU 0X058D
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#define BCMA_BOARD_TYPE_BCM953572NR2 0X058E
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#define BCMA_BOARD_TYPE_BCM947188NR2 0X058F
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#define BCMA_BOARD_TYPE_BCM953572SDRNR2 0X0590
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/* BCM43142 */
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#define BCMA_BOARD_TYPE_BCM943142HM 0X05E0
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struct bcma_device {
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struct bcma_bus *bus;
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struct bcma_device_id id;
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struct device dev;
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struct device *dma_dev;
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unsigned int irq;
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bool dev_registered;
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u8 core_index;
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u8 core_unit;
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u32 addr;
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u32 addr_s[8];
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u32 wrap;
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void __iomem *io_addr;
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void __iomem *io_wrap;
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void *drvdata;
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struct list_head list;
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};
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static inline void *bcma_get_drvdata(struct bcma_device *core)
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{
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return core->drvdata;
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}
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static inline void bcma_set_drvdata(struct bcma_device *core, void *drvdata)
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{
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core->drvdata = drvdata;
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}
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struct bcma_driver {
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const char *name;
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const struct bcma_device_id *id_table;
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int (*probe)(struct bcma_device *dev);
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void (*remove)(struct bcma_device *dev);
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int (*suspend)(struct bcma_device *dev);
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int (*resume)(struct bcma_device *dev);
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void (*shutdown)(struct bcma_device *dev);
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struct device_driver drv;
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};
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extern
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int __bcma_driver_register(struct bcma_driver *drv, struct module *owner);
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#define bcma_driver_register(drv) \
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__bcma_driver_register(drv, THIS_MODULE)
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extern void bcma_driver_unregister(struct bcma_driver *drv);
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/* module_bcma_driver() - Helper macro for drivers that don't do
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* anything special in module init/exit. This eliminates a lot of
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* boilerplate. Each module may only use this macro once, and
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* calling it replaces module_init() and module_exit()
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*/
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#define module_bcma_driver(__bcma_driver) \
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module_driver(__bcma_driver, bcma_driver_register, \
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bcma_driver_unregister)
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/* Set a fallback SPROM.
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* See kdoc at the function definition for complete documentation. */
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extern int bcma_arch_register_fallback_sprom(
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int (*sprom_callback)(struct bcma_bus *bus,
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struct ssb_sprom *out));
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struct bcma_bus {
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/* The MMIO area. */
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void __iomem *mmio;
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const struct bcma_host_ops *ops;
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enum bcma_hosttype hosttype;
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bool host_is_pcie2; /* Used for BCMA_HOSTTYPE_PCI only */
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union {
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/* Pointer to the PCI bus (only for BCMA_HOSTTYPE_PCI) */
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struct pci_dev *host_pci;
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/* Pointer to the SDIO device (only for BCMA_HOSTTYPE_SDIO) */
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struct sdio_func *host_sdio;
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/* Pointer to platform device (only for BCMA_HOSTTYPE_SOC) */
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struct platform_device *host_pdev;
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};
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struct bcma_chipinfo chipinfo;
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struct bcma_boardinfo boardinfo;
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struct bcma_device *mapped_core;
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struct list_head cores;
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u8 nr_cores;
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u8 num;
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struct bcma_drv_cc drv_cc;
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struct bcma_drv_cc_b drv_cc_b;
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struct bcma_drv_pci drv_pci[2];
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struct bcma_drv_pcie2 drv_pcie2;
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struct bcma_drv_mips drv_mips;
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struct bcma_drv_gmac_cmn drv_gmac_cmn;
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/* We decided to share SPROM struct with SSB as long as we do not need
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* any hacks for BCMA. This simplifies drivers code. */
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struct ssb_sprom sprom;
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};
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static inline u32 bcma_read8(struct bcma_device *core, u16 offset)
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{
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return core->bus->ops->read8(core, offset);
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}
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static inline u32 bcma_read16(struct bcma_device *core, u16 offset)
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{
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return core->bus->ops->read16(core, offset);
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}
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static inline u32 bcma_read32(struct bcma_device *core, u16 offset)
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{
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return core->bus->ops->read32(core, offset);
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}
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static inline
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void bcma_write8(struct bcma_device *core, u16 offset, u32 value)
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{
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core->bus->ops->write8(core, offset, value);
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}
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static inline
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void bcma_write16(struct bcma_device *core, u16 offset, u32 value)
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{
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core->bus->ops->write16(core, offset, value);
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}
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static inline
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void bcma_write32(struct bcma_device *core, u16 offset, u32 value)
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{
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core->bus->ops->write32(core, offset, value);
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}
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#ifdef CONFIG_BCMA_BLOCKIO
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static inline void bcma_block_read(struct bcma_device *core, void *buffer,
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size_t count, u16 offset, u8 reg_width)
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{
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core->bus->ops->block_read(core, buffer, count, offset, reg_width);
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}
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static inline void bcma_block_write(struct bcma_device *core,
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const void *buffer, size_t count,
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u16 offset, u8 reg_width)
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{
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core->bus->ops->block_write(core, buffer, count, offset, reg_width);
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}
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#endif
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static inline u32 bcma_aread32(struct bcma_device *core, u16 offset)
|
|
{
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return core->bus->ops->aread32(core, offset);
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|
}
|
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static inline
|
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void bcma_awrite32(struct bcma_device *core, u16 offset, u32 value)
|
|
{
|
|
core->bus->ops->awrite32(core, offset, value);
|
|
}
|
|
|
|
static inline void bcma_mask32(struct bcma_device *cc, u16 offset, u32 mask)
|
|
{
|
|
bcma_write32(cc, offset, bcma_read32(cc, offset) & mask);
|
|
}
|
|
static inline void bcma_set32(struct bcma_device *cc, u16 offset, u32 set)
|
|
{
|
|
bcma_write32(cc, offset, bcma_read32(cc, offset) | set);
|
|
}
|
|
static inline void bcma_maskset32(struct bcma_device *cc,
|
|
u16 offset, u32 mask, u32 set)
|
|
{
|
|
bcma_write32(cc, offset, (bcma_read32(cc, offset) & mask) | set);
|
|
}
|
|
static inline void bcma_mask16(struct bcma_device *cc, u16 offset, u16 mask)
|
|
{
|
|
bcma_write16(cc, offset, bcma_read16(cc, offset) & mask);
|
|
}
|
|
static inline void bcma_set16(struct bcma_device *cc, u16 offset, u16 set)
|
|
{
|
|
bcma_write16(cc, offset, bcma_read16(cc, offset) | set);
|
|
}
|
|
static inline void bcma_maskset16(struct bcma_device *cc,
|
|
u16 offset, u16 mask, u16 set)
|
|
{
|
|
bcma_write16(cc, offset, (bcma_read16(cc, offset) & mask) | set);
|
|
}
|
|
|
|
extern struct bcma_device *bcma_find_core_unit(struct bcma_bus *bus, u16 coreid,
|
|
u8 unit);
|
|
static inline struct bcma_device *bcma_find_core(struct bcma_bus *bus,
|
|
u16 coreid)
|
|
{
|
|
return bcma_find_core_unit(bus, coreid, 0);
|
|
}
|
|
|
|
#ifdef CONFIG_BCMA_HOST_PCI
|
|
extern void bcma_host_pci_up(struct bcma_bus *bus);
|
|
extern void bcma_host_pci_down(struct bcma_bus *bus);
|
|
extern int bcma_host_pci_irq_ctl(struct bcma_bus *bus,
|
|
struct bcma_device *core, bool enable);
|
|
#else
|
|
static inline void bcma_host_pci_up(struct bcma_bus *bus)
|
|
{
|
|
}
|
|
static inline void bcma_host_pci_down(struct bcma_bus *bus)
|
|
{
|
|
}
|
|
static inline int bcma_host_pci_irq_ctl(struct bcma_bus *bus,
|
|
struct bcma_device *core, bool enable)
|
|
{
|
|
if (bus->hosttype == BCMA_HOSTTYPE_PCI)
|
|
return -ENOTSUPP;
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
extern bool bcma_core_is_enabled(struct bcma_device *core);
|
|
extern void bcma_core_disable(struct bcma_device *core, u32 flags);
|
|
extern int bcma_core_enable(struct bcma_device *core, u32 flags);
|
|
extern void bcma_core_set_clockmode(struct bcma_device *core,
|
|
enum bcma_clkmode clkmode);
|
|
extern void bcma_core_pll_ctl(struct bcma_device *core, u32 req, u32 status,
|
|
bool on);
|
|
extern u32 bcma_chipco_pll_read(struct bcma_drv_cc *cc, u32 offset);
|
|
#define BCMA_DMA_TRANSLATION_MASK 0xC0000000
|
|
#define BCMA_DMA_TRANSLATION_NONE 0x00000000
|
|
#define BCMA_DMA_TRANSLATION_DMA32_CMT 0x40000000 /* Client Mode Translation for 32-bit DMA */
|
|
#define BCMA_DMA_TRANSLATION_DMA64_CMT 0x80000000 /* Client Mode Translation for 64-bit DMA */
|
|
extern u32 bcma_core_dma_translation(struct bcma_device *core);
|
|
|
|
extern unsigned int bcma_core_irq(struct bcma_device *core, int num);
|
|
|
|
#endif /* LINUX_BCMA_H_ */
|