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This pinctrl driver supports the 98DX3236, 98DX3336 and 98DX4251 SoCs from Marvell. Signed-off-by: Kalyan Kinthada <kalyan.kinthada@alliedtelesis.co.nz> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
47 lines
1.9 KiB
Plaintext
47 lines
1.9 KiB
Plaintext
* Marvell 98dx3236 pinctrl driver for mpp
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Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
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part and usage
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Required properties:
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- compatible: "marvell,98dx3236-pinctrl" or "marvell,98dx4251-pinctrl"
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- reg: register specifier of MPP registers
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This driver supports all 98dx3236, 98dx3336 and 98dx4251 variants
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name pins functions
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================================================================================
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mpp0 0 gpo, spi0(mosi), dev(ad8)
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mpp1 1 gpio, spi0(miso), dev(ad9)
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mpp2 2 gpo, spi0(sck), dev(ad10)
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mpp3 3 gpio, spi0(cs0), dev(ad11)
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mpp4 4 gpio, spi0(cs1), smi(mdc), dev(cs0)
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mpp5 5 gpio, pex(rsto), sd0(cmd), dev(bootcs)
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mpp6 6 gpo, sd0(clk), dev(a2)
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mpp7 7 gpio, sd0(d0), dev(ale0)
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mpp8 8 gpio, sd0(d1), dev(ale1)
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mpp9 9 gpio, sd0(d2), dev(ready0)
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mpp10 10 gpio, sd0(d3), dev(ad12)
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mpp11 11 gpio, uart1(rxd), uart0(cts), dev(ad13)
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mpp12 12 gpo, uart1(txd), uart0(rts), dev(ad14)
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mpp13 13 gpio, intr(out), dev(ad15)
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mpp14 14 gpio, i2c0(sck)
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mpp15 15 gpio, i2c0(sda)
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mpp16 16 gpo, dev(oe)
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mpp17 17 gpo, dev(clkout)
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mpp18 18 gpio, uart1(txd)
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mpp19 19 gpio, uart1(rxd), dev(rb)
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mpp20 20 gpo, dev(we0)
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mpp21 21 gpo, dev(ad0)
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mpp22 22 gpo, dev(ad1)
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mpp23 23 gpo, dev(ad2)
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mpp24 24 gpo, dev(ad3)
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mpp25 25 gpo, dev(ad4)
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mpp26 26 gpo, dev(ad5)
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mpp27 27 gpo, dev(ad6)
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mpp28 28 gpo, dev(ad7)
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mpp29 29 gpo, dev(a0)
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mpp30 30 gpo, dev(a1)
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mpp31 31 gpio, slv_smi(mdc), smi(mdc), dev(we1)
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mpp32 32 gpio, slv_smi(mdio), smi(mdio), dev(cs1)
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