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1591fadf85
There's at least one system that does not interpret the value of
the device's 'startadd' field correctly, which leads to incorrectly
displayed scanout buffers. Always placing the active scanout buffer
at offset 0 works around the problem.
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Reported-by: John Donnelly <john.p.donnelly@oracle.com>
Tested-by: John Donnelly <john.p.donnelly@oracle.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Fixes: 81da87f63a ("drm: Replace drm_gem_vram_push_to_system() with kunmap + unpin")
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Dave Airlie <airlied@redhat.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Maxime Ripard <mripard@kernel.org>
Cc: David Airlie <airlied@linux.ie>
Cc: Sam Ravnborg <sam@ravnborg.org>
Cc: "Y.C. Chen" <yc_chen@aspeedtech.com>
Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: "José Roberto de Souza" <jose.souza@intel.com>
Cc: Andrzej Pietrasiewicz <andrzej.p@collabora.com>
Cc: dri-devel@lists.freedesktop.org
Cc: <stable@vger.kernel.org> # v5.3+
Link: https://gitlab.freedesktop.org/drm/misc/issues/7
Link: https://patchwork.freedesktop.org/patch/msgid/20191126101529.20356-4-tzimmermann@suse.de
225 lines
4.9 KiB
C
225 lines
4.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright 2010 Matt Turner.
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* Copyright 2012 Red Hat
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*
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* Authors: Matthew Garrett
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* Matt Turner
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* Dave Airlie
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*/
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#ifndef __MGAG200_DRV_H__
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#define __MGAG200_DRV_H__
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#include <linux/i2c-algo-bit.h>
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#include <linux/i2c.h>
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#include <video/vga.h>
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#include <drm/drm_encoder.h>
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#include <drm/drm_fb_helper.h>
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#include <drm/drm_gem.h>
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#include <drm/drm_gem_vram_helper.h>
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#include "mgag200_reg.h"
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#define DRIVER_AUTHOR "Matthew Garrett"
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#define DRIVER_NAME "mgag200"
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#define DRIVER_DESC "MGA G200 SE"
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#define DRIVER_DATE "20110418"
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#define DRIVER_MAJOR 1
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#define DRIVER_MINOR 0
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#define DRIVER_PATCHLEVEL 0
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#define MGAG200FB_CONN_LIMIT 1
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#define RREG8(reg) ioread8(((void __iomem *)mdev->rmmio) + (reg))
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#define WREG8(reg, v) iowrite8(v, ((void __iomem *)mdev->rmmio) + (reg))
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#define RREG32(reg) ioread32(((void __iomem *)mdev->rmmio) + (reg))
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#define WREG32(reg, v) iowrite32(v, ((void __iomem *)mdev->rmmio) + (reg))
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#define ATTR_INDEX 0x1fc0
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#define ATTR_DATA 0x1fc1
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#define WREG_ATTR(reg, v) \
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do { \
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RREG8(0x1fda); \
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WREG8(ATTR_INDEX, reg); \
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WREG8(ATTR_DATA, v); \
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} while (0) \
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#define WREG_SEQ(reg, v) \
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do { \
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WREG8(MGAREG_SEQ_INDEX, reg); \
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WREG8(MGAREG_SEQ_DATA, v); \
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} while (0) \
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#define WREG_CRT(reg, v) \
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do { \
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WREG8(MGAREG_CRTC_INDEX, reg); \
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WREG8(MGAREG_CRTC_DATA, v); \
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} while (0) \
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#define WREG_ECRT(reg, v) \
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do { \
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WREG8(MGAREG_CRTCEXT_INDEX, reg); \
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WREG8(MGAREG_CRTCEXT_DATA, v); \
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} while (0) \
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#define GFX_INDEX 0x1fce
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#define GFX_DATA 0x1fcf
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#define WREG_GFX(reg, v) \
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do { \
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WREG8(GFX_INDEX, reg); \
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WREG8(GFX_DATA, v); \
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} while (0) \
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#define DAC_INDEX 0x3c00
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#define DAC_DATA 0x3c0a
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#define WREG_DAC(reg, v) \
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do { \
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WREG8(DAC_INDEX, reg); \
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WREG8(DAC_DATA, v); \
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} while (0) \
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#define MGA_MISC_OUT 0x1fc2
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#define MGA_MISC_IN 0x1fcc
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#define MGAG200_MAX_FB_HEIGHT 4096
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#define MGAG200_MAX_FB_WIDTH 4096
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#define MATROX_DPMS_CLEARED (-1)
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#define to_mga_crtc(x) container_of(x, struct mga_crtc, base)
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#define to_mga_encoder(x) container_of(x, struct mga_encoder, base)
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#define to_mga_connector(x) container_of(x, struct mga_connector, base)
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struct mga_crtc {
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struct drm_crtc base;
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u8 lut_r[256], lut_g[256], lut_b[256];
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int last_dpms;
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bool enabled;
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};
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struct mga_mode_info {
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bool mode_config_initialized;
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struct mga_crtc *crtc;
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};
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struct mga_encoder {
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struct drm_encoder base;
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int last_dpms;
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};
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struct mga_i2c_chan {
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struct i2c_adapter adapter;
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struct drm_device *dev;
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struct i2c_algo_bit_data bit;
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int data, clock;
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};
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struct mga_connector {
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struct drm_connector base;
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struct mga_i2c_chan *i2c;
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};
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struct mga_cursor {
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struct drm_gem_vram_object *gbo[2];
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unsigned int next_index;
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};
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struct mga_mc {
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resource_size_t vram_size;
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resource_size_t vram_base;
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resource_size_t vram_window;
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};
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enum mga_type {
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G200_SE_A,
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G200_SE_B,
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G200_WB,
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G200_EV,
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G200_EH,
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G200_EH3,
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G200_ER,
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G200_EW3,
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};
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/* HW does not handle 'startadd' field correct. */
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#define MGAG200_FLAG_HW_BUG_NO_STARTADD (1ul << 8)
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#define MGAG200_TYPE_MASK (0x000000ff)
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#define MGAG200_FLAG_MASK (0x00ffff00)
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#define IS_G200_SE(mdev) (mdev->type == G200_SE_A || mdev->type == G200_SE_B)
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struct mga_device {
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struct drm_device *dev;
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unsigned long flags;
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resource_size_t rmmio_base;
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resource_size_t rmmio_size;
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void __iomem *rmmio;
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struct mga_mc mc;
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struct mga_mode_info mode_info;
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struct mga_cursor cursor;
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size_t vram_fb_available;
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bool suspended;
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int num_crtc;
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enum mga_type type;
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int has_sdram;
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struct drm_display_mode mode;
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int bpp_shifts[4];
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int fb_mtrr;
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/* SE model number stored in reg 0x1e24 */
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u32 unique_rev_id;
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};
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static inline enum mga_type
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mgag200_type_from_driver_data(kernel_ulong_t driver_data)
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{
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return (enum mga_type)(driver_data & MGAG200_TYPE_MASK);
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}
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static inline unsigned long
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mgag200_flags_from_driver_data(kernel_ulong_t driver_data)
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{
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return driver_data & MGAG200_FLAG_MASK;
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}
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/* mgag200_mode.c */
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int mgag200_modeset_init(struct mga_device *mdev);
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void mgag200_modeset_fini(struct mga_device *mdev);
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/* mgag200_main.c */
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int mgag200_driver_load(struct drm_device *dev, unsigned long flags);
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void mgag200_driver_unload(struct drm_device *dev);
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/* mgag200_i2c.c */
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struct mga_i2c_chan *mgag200_i2c_create(struct drm_device *dev);
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void mgag200_i2c_destroy(struct mga_i2c_chan *i2c);
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int mgag200_mm_init(struct mga_device *mdev);
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void mgag200_mm_fini(struct mga_device *mdev);
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int mgag200_mmap(struct file *filp, struct vm_area_struct *vma);
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int mgag200_cursor_init(struct mga_device *mdev);
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void mgag200_cursor_fini(struct mga_device *mdev);
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int mgag200_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
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uint32_t handle, uint32_t width, uint32_t height);
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int mgag200_crtc_cursor_move(struct drm_crtc *crtc, int x, int y);
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#endif /* __MGAG200_DRV_H__ */
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