mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-24 18:41:00 +07:00
fa8031aefe
This marks all the x86 cpuinfo tables to the CPU specific device drivers, to allow auto loading by udev. This should simplify the distribution startup scripts for this greatly. I didn't add MODULE_DEVICE_IDs to the centrino and p4-clockmod drivers, because those probably shouldn't be auto loaded and the acpi driver be used instead (not fully sure on that, would appreciate feedback) The old nforce drivers autoload based on the PCI ID. ACPI cpufreq is autoloaded in another patch. v3: Autoload gx based on PCI IDs only. Remove cpu check (Dave Jones) v4: Use newly introduce HW_PSTATE feature for powernow-k8 loading Cc: Dave Jones <davej@redhat.com> Cc: Kay Sievers <kay.sievers@vrfy.org> Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: Thomas Renninger <trenn@suse.de> Acked-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
328 lines
8.4 KiB
C
328 lines
8.4 KiB
C
/*
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* (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de>
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*
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* Licensed under the terms of the GNU GPL License version 2.
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*
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* BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/cpufreq.h>
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#include <linux/timex.h>
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#include <asm/msr.h>
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#include <asm/processor.h>
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#include <asm/cpu_device_id.h>
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static struct cpufreq_driver longrun_driver;
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/**
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* longrun_{low,high}_freq is needed for the conversion of cpufreq kHz
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* values into per cent values. In TMTA microcode, the following is valid:
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* performance_pctg = (current_freq - low_freq)/(high_freq - low_freq)
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*/
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static unsigned int longrun_low_freq, longrun_high_freq;
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/**
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* longrun_get_policy - get the current LongRun policy
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* @policy: struct cpufreq_policy where current policy is written into
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*
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* Reads the current LongRun policy by access to MSR_TMTA_LONGRUN_FLAGS
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* and MSR_TMTA_LONGRUN_CTRL
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*/
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static void __cpuinit longrun_get_policy(struct cpufreq_policy *policy)
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{
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u32 msr_lo, msr_hi;
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rdmsr(MSR_TMTA_LONGRUN_FLAGS, msr_lo, msr_hi);
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pr_debug("longrun flags are %x - %x\n", msr_lo, msr_hi);
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if (msr_lo & 0x01)
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policy->policy = CPUFREQ_POLICY_PERFORMANCE;
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else
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policy->policy = CPUFREQ_POLICY_POWERSAVE;
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rdmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);
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pr_debug("longrun ctrl is %x - %x\n", msr_lo, msr_hi);
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msr_lo &= 0x0000007F;
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msr_hi &= 0x0000007F;
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if (longrun_high_freq <= longrun_low_freq) {
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/* Assume degenerate Longrun table */
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policy->min = policy->max = longrun_high_freq;
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} else {
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policy->min = longrun_low_freq + msr_lo *
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((longrun_high_freq - longrun_low_freq) / 100);
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policy->max = longrun_low_freq + msr_hi *
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((longrun_high_freq - longrun_low_freq) / 100);
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}
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policy->cpu = 0;
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}
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/**
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* longrun_set_policy - sets a new CPUFreq policy
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* @policy: new policy
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*
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* Sets a new CPUFreq policy on LongRun-capable processors. This function
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* has to be called with cpufreq_driver locked.
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*/
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static int longrun_set_policy(struct cpufreq_policy *policy)
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{
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u32 msr_lo, msr_hi;
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u32 pctg_lo, pctg_hi;
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if (!policy)
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return -EINVAL;
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if (longrun_high_freq <= longrun_low_freq) {
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/* Assume degenerate Longrun table */
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pctg_lo = pctg_hi = 100;
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} else {
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pctg_lo = (policy->min - longrun_low_freq) /
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((longrun_high_freq - longrun_low_freq) / 100);
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pctg_hi = (policy->max - longrun_low_freq) /
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((longrun_high_freq - longrun_low_freq) / 100);
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}
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if (pctg_hi > 100)
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pctg_hi = 100;
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if (pctg_lo > pctg_hi)
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pctg_lo = pctg_hi;
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/* performance or economy mode */
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rdmsr(MSR_TMTA_LONGRUN_FLAGS, msr_lo, msr_hi);
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msr_lo &= 0xFFFFFFFE;
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switch (policy->policy) {
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case CPUFREQ_POLICY_PERFORMANCE:
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msr_lo |= 0x00000001;
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break;
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case CPUFREQ_POLICY_POWERSAVE:
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break;
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}
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wrmsr(MSR_TMTA_LONGRUN_FLAGS, msr_lo, msr_hi);
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/* lower and upper boundary */
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rdmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);
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msr_lo &= 0xFFFFFF80;
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msr_hi &= 0xFFFFFF80;
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msr_lo |= pctg_lo;
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msr_hi |= pctg_hi;
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wrmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);
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return 0;
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}
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/**
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* longrun_verify_poliy - verifies a new CPUFreq policy
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* @policy: the policy to verify
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*
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* Validates a new CPUFreq policy. This function has to be called with
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* cpufreq_driver locked.
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*/
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static int longrun_verify_policy(struct cpufreq_policy *policy)
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{
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if (!policy)
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return -EINVAL;
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policy->cpu = 0;
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cpufreq_verify_within_limits(policy,
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policy->cpuinfo.min_freq,
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policy->cpuinfo.max_freq);
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if ((policy->policy != CPUFREQ_POLICY_POWERSAVE) &&
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(policy->policy != CPUFREQ_POLICY_PERFORMANCE))
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return -EINVAL;
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return 0;
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}
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static unsigned int longrun_get(unsigned int cpu)
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{
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u32 eax, ebx, ecx, edx;
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if (cpu)
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return 0;
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cpuid(0x80860007, &eax, &ebx, &ecx, &edx);
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pr_debug("cpuid eax is %u\n", eax);
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return eax * 1000;
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}
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/**
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* longrun_determine_freqs - determines the lowest and highest possible core frequency
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* @low_freq: an int to put the lowest frequency into
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* @high_freq: an int to put the highest frequency into
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*
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* Determines the lowest and highest possible core frequencies on this CPU.
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* This is necessary to calculate the performance percentage according to
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* TMTA rules:
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* performance_pctg = (target_freq - low_freq)/(high_freq - low_freq)
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*/
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static int __cpuinit longrun_determine_freqs(unsigned int *low_freq,
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unsigned int *high_freq)
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{
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u32 msr_lo, msr_hi;
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u32 save_lo, save_hi;
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u32 eax, ebx, ecx, edx;
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u32 try_hi;
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struct cpuinfo_x86 *c = &cpu_data(0);
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if (!low_freq || !high_freq)
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return -EINVAL;
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if (cpu_has(c, X86_FEATURE_LRTI)) {
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/* if the LongRun Table Interface is present, the
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* detection is a bit easier:
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* For minimum frequency, read out the maximum
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* level (msr_hi), write that into "currently
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* selected level", and read out the frequency.
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* For maximum frequency, read out level zero.
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*/
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/* minimum */
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rdmsr(MSR_TMTA_LRTI_READOUT, msr_lo, msr_hi);
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wrmsr(MSR_TMTA_LRTI_READOUT, msr_hi, msr_hi);
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rdmsr(MSR_TMTA_LRTI_VOLT_MHZ, msr_lo, msr_hi);
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*low_freq = msr_lo * 1000; /* to kHz */
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/* maximum */
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wrmsr(MSR_TMTA_LRTI_READOUT, 0, msr_hi);
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rdmsr(MSR_TMTA_LRTI_VOLT_MHZ, msr_lo, msr_hi);
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*high_freq = msr_lo * 1000; /* to kHz */
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pr_debug("longrun table interface told %u - %u kHz\n",
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*low_freq, *high_freq);
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if (*low_freq > *high_freq)
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*low_freq = *high_freq;
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return 0;
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}
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/* set the upper border to the value determined during TSC init */
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*high_freq = (cpu_khz / 1000);
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*high_freq = *high_freq * 1000;
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pr_debug("high frequency is %u kHz\n", *high_freq);
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/* get current borders */
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rdmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);
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save_lo = msr_lo & 0x0000007F;
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save_hi = msr_hi & 0x0000007F;
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/* if current perf_pctg is larger than 90%, we need to decrease the
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* upper limit to make the calculation more accurate.
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*/
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cpuid(0x80860007, &eax, &ebx, &ecx, &edx);
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/* try decreasing in 10% steps, some processors react only
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* on some barrier values */
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for (try_hi = 80; try_hi > 0 && ecx > 90; try_hi -= 10) {
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/* set to 0 to try_hi perf_pctg */
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msr_lo &= 0xFFFFFF80;
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msr_hi &= 0xFFFFFF80;
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msr_hi |= try_hi;
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wrmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);
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/* read out current core MHz and current perf_pctg */
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cpuid(0x80860007, &eax, &ebx, &ecx, &edx);
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/* restore values */
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wrmsr(MSR_TMTA_LONGRUN_CTRL, save_lo, save_hi);
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}
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pr_debug("percentage is %u %%, freq is %u MHz\n", ecx, eax);
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/* performance_pctg = (current_freq - low_freq)/(high_freq - low_freq)
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* eqals
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* low_freq * (1 - perf_pctg) = (cur_freq - high_freq * perf_pctg)
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*
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* high_freq * perf_pctg is stored tempoarily into "ebx".
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*/
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ebx = (((cpu_khz / 1000) * ecx) / 100); /* to MHz */
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if ((ecx > 95) || (ecx == 0) || (eax < ebx))
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return -EIO;
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edx = ((eax - ebx) * 100) / (100 - ecx);
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*low_freq = edx * 1000; /* back to kHz */
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pr_debug("low frequency is %u kHz\n", *low_freq);
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if (*low_freq > *high_freq)
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*low_freq = *high_freq;
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return 0;
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}
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static int __cpuinit longrun_cpu_init(struct cpufreq_policy *policy)
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{
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int result = 0;
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/* capability check */
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if (policy->cpu != 0)
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return -ENODEV;
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/* detect low and high frequency */
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result = longrun_determine_freqs(&longrun_low_freq, &longrun_high_freq);
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if (result)
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return result;
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/* cpuinfo and default policy values */
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policy->cpuinfo.min_freq = longrun_low_freq;
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policy->cpuinfo.max_freq = longrun_high_freq;
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policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
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longrun_get_policy(policy);
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return 0;
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}
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static struct cpufreq_driver longrun_driver = {
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.flags = CPUFREQ_CONST_LOOPS,
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.verify = longrun_verify_policy,
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.setpolicy = longrun_set_policy,
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.get = longrun_get,
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.init = longrun_cpu_init,
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.name = "longrun",
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.owner = THIS_MODULE,
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};
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static const struct x86_cpu_id longrun_ids[] = {
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{ X86_VENDOR_TRANSMETA, X86_FAMILY_ANY, X86_MODEL_ANY,
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X86_FEATURE_LONGRUN },
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{}
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};
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MODULE_DEVICE_TABLE(x86cpu, longrun_ids);
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/**
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* longrun_init - initializes the Transmeta Crusoe LongRun CPUFreq driver
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*
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* Initializes the LongRun support.
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*/
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static int __init longrun_init(void)
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{
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if (!x86_match_cpu(longrun_ids))
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return -ENODEV;
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return cpufreq_register_driver(&longrun_driver);
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}
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/**
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* longrun_exit - unregisters LongRun support
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*/
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static void __exit longrun_exit(void)
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{
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cpufreq_unregister_driver(&longrun_driver);
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}
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MODULE_AUTHOR("Dominik Brodowski <linux@brodo.de>");
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MODULE_DESCRIPTION("LongRun driver for Transmeta Crusoe and "
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"Efficeon processors.");
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MODULE_LICENSE("GPL");
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module_init(longrun_init);
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module_exit(longrun_exit);
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