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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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This patch adds a driver for clock controller being a part of Audio Subsystem present on S5PV210 and compatible SoCs. It is used to provide clocks for other IP blocks of this subsystem. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
54 lines
1.8 KiB
Plaintext
54 lines
1.8 KiB
Plaintext
* Samsung Audio Subsystem Clock Controller
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The Samsung Audio Subsystem clock controller generates and supplies clocks
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to Audio Subsystem block available in the S5PV210 and compatible SoCs.
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Required Properties:
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- compatible: should be "samsung,s5pv210-audss-clock".
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- reg: physical base address and length of the controller's register set.
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- #clock-cells: should be 1.
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- clocks:
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- hclk: AHB bus clock of the Audio Subsystem.
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- xxti: Optional fixed rate PLL reference clock, parent of mout_audss. If
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not specified (i.e. xusbxti is used for PLL reference), it is fixed to
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a clock named "xxti".
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- fout_epll: Input PLL to the AudioSS block, parent of mout_audss.
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- iiscdclk0: Optional external i2s clock, parent of mout_i2s. If not
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specified, it is fixed to a clock named "iiscdclk0".
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- sclk_audio0: Audio bus clock, parent of mout_i2s.
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- clock-names: Aliases for the above clocks. They should be "hclk",
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"xxti", "fout_epll", "iiscdclk0", and "sclk_audio0" respectively.
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All available clocks are defined as preprocessor macros in
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dt-bindings/clock/s5pv210-audss-clk.h header and can be used in device
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tree sources.
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Example: Clock controller node.
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clk_audss: clock-controller@c0900000 {
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compatible = "samsung,s5pv210-audss-clock";
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reg = <0xc0900000 0x1000>;
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#clock-cells = <1>;
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clock-names = "hclk", "xxti",
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"fout_epll", "sclk_audio0";
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clocks = <&clocks DOUT_HCLKP>, <&xxti>,
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<&clocks FOUT_EPLL>, <&clocks SCLK_AUDIO0>;
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};
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Example: I2S controller node that consumes the clock generated by the clock
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controller. Refer to the standard clock bindings for information
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about 'clocks' and 'clock-names' property.
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i2s0: i2s@03830000 {
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/* ... */
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clock-names = "iis", "i2s_opclk0",
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"i2s_opclk1";
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clocks = <&clk_audss CLK_I2S>, <&clk_audss CLK_I2S>,
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<&clk_audss CLK_DOUT_AUD_BUS>;
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/* ... */
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};
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