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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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cb9f753a37
Thanks to commit 4b3ef9daa4 ("mm/swap: split swap cache into 64MB
trunks"), after swapoff the address_space associated with the swap
device will be freed. So page_mapping() users which may touch the
address_space need some kind of mechanism to prevent the address_space
from being freed during accessing.
The dcache flushing functions (flush_dcache_page(), etc) in architecture
specific code may access the address_space of swap device for anonymous
pages in swap cache via page_mapping() function. But in some cases
there are no mechanisms to prevent the swap device from being swapoff,
for example,
CPU1 CPU2
__get_user_pages() swapoff()
flush_dcache_page()
mapping = page_mapping()
... exit_swap_address_space()
... kvfree(spaces)
mapping_mapped(mapping)
The address space may be accessed after being freed.
But from cachetlb.txt and Russell King, flush_dcache_page() only care
about file cache pages, for anonymous pages, flush_anon_page() should be
used. The implementation of flush_dcache_page() in all architectures
follows this too. They will check whether page_mapping() is NULL and
whether mapping_mapped() is true to determine whether to flush the
dcache immediately. And they will use interval tree (mapping->i_mmap)
to find all user space mappings. While mapping_mapped() and
mapping->i_mmap isn't used by anonymous pages in swap cache at all.
So, to fix the race between swapoff and flush dcache, __page_mapping()
is add to return the address_space for file cache pages and NULL
otherwise. All page_mapping() invoking in flush dcache functions are
replaced with page_mapping_file().
[akpm@linux-foundation.org: simplify page_mapping_file(), per Mike]
Link: http://lkml.kernel.org/r/20180305083634.15174-1-ying.huang@intel.com
Signed-off-by: "Huang, Ying" <ying.huang@intel.com>
Reviewed-by: Andrew Morton <akpm@linux-foundation.org>
Cc: Minchan Kim <minchan@kernel.org>
Cc: Michal Hocko <mhocko@suse.com>
Cc: Johannes Weiner <hannes@cmpxchg.org>
Cc: Mel Gorman <mgorman@techsingularity.net>
Cc: Dave Hansen <dave.hansen@intel.com>
Cc: Chen Liqin <liqin.linux@gmail.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Cc: "James E.J. Bottomley" <jejb@parisc-linux.org>
Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Chris Zankel <chris@zankel.net>
Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Ley Foon Tan <lftan@altera.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Mike Rapoport <rppt@linux.vnet.ibm.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
116 lines
3.4 KiB
C
116 lines
3.4 KiB
C
/*
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* linux/arch/arm/lib/copypage-armv4mc.S
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*
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* Copyright (C) 1995-2005 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This handles the mini data cache, as found on SA11x0 and XScale
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* processors. When we copy a user page page, we map it in such a way
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* that accesses to this page will not touch the main data cache, but
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* will be cached in the mini data cache. This prevents us thrashing
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* the main data cache on page faults.
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*/
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#include <linux/init.h>
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#include <linux/mm.h>
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#include <linux/highmem.h>
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#include <asm/pgtable.h>
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#include <asm/tlbflush.h>
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#include <asm/cacheflush.h>
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#include "mm.h"
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#define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \
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L_PTE_MT_MINICACHE)
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static DEFINE_RAW_SPINLOCK(minicache_lock);
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/*
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* ARMv4 mini-dcache optimised copy_user_highpage
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*
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* We flush the destination cache lines just before we write the data into the
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* corresponding address. Since the Dcache is read-allocate, this removes the
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* Dcache aliasing issue. The writes will be forwarded to the write buffer,
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* and merged as appropriate.
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*
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* Note: We rely on all ARMv4 processors implementing the "invalidate D line"
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* instruction. If your processor does not supply this, you have to write your
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* own copy_user_highpage that does the right thing.
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*/
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static void __naked
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mc_copy_user_page(void *from, void *to)
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{
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asm volatile(
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"stmfd sp!, {r4, lr} @ 2\n\
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mov r4, %2 @ 1\n\
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ldmia %0!, {r2, r3, ip, lr} @ 4\n\
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1: mcr p15, 0, %1, c7, c6, 1 @ 1 invalidate D line\n\
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stmia %1!, {r2, r3, ip, lr} @ 4\n\
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ldmia %0!, {r2, r3, ip, lr} @ 4+1\n\
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stmia %1!, {r2, r3, ip, lr} @ 4\n\
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ldmia %0!, {r2, r3, ip, lr} @ 4\n\
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mcr p15, 0, %1, c7, c6, 1 @ 1 invalidate D line\n\
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stmia %1!, {r2, r3, ip, lr} @ 4\n\
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ldmia %0!, {r2, r3, ip, lr} @ 4\n\
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subs r4, r4, #1 @ 1\n\
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stmia %1!, {r2, r3, ip, lr} @ 4\n\
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ldmneia %0!, {r2, r3, ip, lr} @ 4\n\
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bne 1b @ 1\n\
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ldmfd sp!, {r4, pc} @ 3"
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:
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: "r" (from), "r" (to), "I" (PAGE_SIZE / 64));
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}
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void v4_mc_copy_user_highpage(struct page *to, struct page *from,
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unsigned long vaddr, struct vm_area_struct *vma)
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{
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void *kto = kmap_atomic(to);
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if (!test_and_set_bit(PG_dcache_clean, &from->flags))
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__flush_dcache_page(page_mapping_file(from), from);
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raw_spin_lock(&minicache_lock);
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set_top_pte(COPYPAGE_MINICACHE, mk_pte(from, minicache_pgprot));
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mc_copy_user_page((void *)COPYPAGE_MINICACHE, kto);
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raw_spin_unlock(&minicache_lock);
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kunmap_atomic(kto);
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}
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/*
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* ARMv4 optimised clear_user_page
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*/
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void v4_mc_clear_user_highpage(struct page *page, unsigned long vaddr)
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{
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void *ptr, *kaddr = kmap_atomic(page);
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asm volatile("\
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mov r1, %2 @ 1\n\
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mov r2, #0 @ 1\n\
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mov r3, #0 @ 1\n\
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mov ip, #0 @ 1\n\
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mov lr, #0 @ 1\n\
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1: mcr p15, 0, %0, c7, c6, 1 @ 1 invalidate D line\n\
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stmia %0!, {r2, r3, ip, lr} @ 4\n\
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stmia %0!, {r2, r3, ip, lr} @ 4\n\
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mcr p15, 0, %0, c7, c6, 1 @ 1 invalidate D line\n\
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stmia %0!, {r2, r3, ip, lr} @ 4\n\
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stmia %0!, {r2, r3, ip, lr} @ 4\n\
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subs r1, r1, #1 @ 1\n\
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bne 1b @ 1"
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: "=r" (ptr)
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: "0" (kaddr), "I" (PAGE_SIZE / 64)
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: "r1", "r2", "r3", "ip", "lr");
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kunmap_atomic(kaddr);
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}
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struct cpu_user_fns v4_mc_user_fns __initdata = {
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.cpu_clear_user_highpage = v4_mc_clear_user_highpage,
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.cpu_copy_user_highpage = v4_mc_copy_user_highpage,
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};
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