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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not see http www gnu org licenses extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 503 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Enrico Weigelt <info@metux.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190602204653.811534538@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
161 lines
3.8 KiB
C
161 lines
3.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Based on arch/arm/include/asm/barrier.h
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*
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* Copyright (C) 2012 ARM Ltd.
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*/
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#ifndef __ASM_BARRIER_H
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#define __ASM_BARRIER_H
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#ifndef __ASSEMBLY__
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#include <linux/kasan-checks.h>
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#define __nops(n) ".rept " #n "\nnop\n.endr\n"
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#define nops(n) asm volatile(__nops(n))
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#define sev() asm volatile("sev" : : : "memory")
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#define wfe() asm volatile("wfe" : : : "memory")
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#define wfi() asm volatile("wfi" : : : "memory")
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#define isb() asm volatile("isb" : : : "memory")
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#define dmb(opt) asm volatile("dmb " #opt : : : "memory")
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#define dsb(opt) asm volatile("dsb " #opt : : : "memory")
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#define psb_csync() asm volatile("hint #17" : : : "memory")
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#define csdb() asm volatile("hint #20" : : : "memory")
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#define spec_bar() asm volatile(ALTERNATIVE("dsb nsh\nisb\n", \
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SB_BARRIER_INSN"nop\n", \
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ARM64_HAS_SB))
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#define mb() dsb(sy)
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#define rmb() dsb(ld)
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#define wmb() dsb(st)
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#define dma_rmb() dmb(oshld)
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#define dma_wmb() dmb(oshst)
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/*
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* Generate a mask for array_index__nospec() that is ~0UL when 0 <= idx < sz
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* and 0 otherwise.
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*/
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#define array_index_mask_nospec array_index_mask_nospec
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static inline unsigned long array_index_mask_nospec(unsigned long idx,
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unsigned long sz)
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{
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unsigned long mask;
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asm volatile(
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" cmp %1, %2\n"
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" sbc %0, xzr, xzr\n"
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: "=r" (mask)
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: "r" (idx), "Ir" (sz)
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: "cc");
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csdb();
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return mask;
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}
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#define __smp_mb() dmb(ish)
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#define __smp_rmb() dmb(ishld)
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#define __smp_wmb() dmb(ishst)
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#define __smp_store_release(p, v) \
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do { \
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typeof(p) __p = (p); \
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union { typeof(*p) __val; char __c[1]; } __u = \
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{ .__val = (__force typeof(*p)) (v) }; \
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compiletime_assert_atomic_type(*p); \
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kasan_check_write(__p, sizeof(*p)); \
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switch (sizeof(*p)) { \
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case 1: \
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asm volatile ("stlrb %w1, %0" \
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: "=Q" (*__p) \
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: "r" (*(__u8 *)__u.__c) \
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: "memory"); \
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break; \
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case 2: \
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asm volatile ("stlrh %w1, %0" \
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: "=Q" (*__p) \
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: "r" (*(__u16 *)__u.__c) \
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: "memory"); \
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break; \
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case 4: \
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asm volatile ("stlr %w1, %0" \
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: "=Q" (*__p) \
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: "r" (*(__u32 *)__u.__c) \
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: "memory"); \
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break; \
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case 8: \
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asm volatile ("stlr %1, %0" \
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: "=Q" (*__p) \
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: "r" (*(__u64 *)__u.__c) \
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: "memory"); \
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break; \
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} \
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} while (0)
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#define __smp_load_acquire(p) \
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({ \
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union { typeof(*p) __val; char __c[1]; } __u; \
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typeof(p) __p = (p); \
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compiletime_assert_atomic_type(*p); \
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kasan_check_read(__p, sizeof(*p)); \
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switch (sizeof(*p)) { \
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case 1: \
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asm volatile ("ldarb %w0, %1" \
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: "=r" (*(__u8 *)__u.__c) \
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: "Q" (*__p) : "memory"); \
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break; \
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case 2: \
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asm volatile ("ldarh %w0, %1" \
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: "=r" (*(__u16 *)__u.__c) \
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: "Q" (*__p) : "memory"); \
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break; \
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case 4: \
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asm volatile ("ldar %w0, %1" \
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: "=r" (*(__u32 *)__u.__c) \
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: "Q" (*__p) : "memory"); \
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break; \
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case 8: \
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asm volatile ("ldar %0, %1" \
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: "=r" (*(__u64 *)__u.__c) \
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: "Q" (*__p) : "memory"); \
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break; \
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} \
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__u.__val; \
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})
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#define smp_cond_load_relaxed(ptr, cond_expr) \
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({ \
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typeof(ptr) __PTR = (ptr); \
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typeof(*ptr) VAL; \
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for (;;) { \
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VAL = READ_ONCE(*__PTR); \
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if (cond_expr) \
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break; \
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__cmpwait_relaxed(__PTR, VAL); \
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} \
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VAL; \
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})
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#define smp_cond_load_acquire(ptr, cond_expr) \
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({ \
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typeof(ptr) __PTR = (ptr); \
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typeof(*ptr) VAL; \
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for (;;) { \
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VAL = smp_load_acquire(__PTR); \
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if (cond_expr) \
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break; \
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__cmpwait_relaxed(__PTR, VAL); \
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} \
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VAL; \
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})
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#include <asm-generic/barrier.h>
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#endif /* __ASSEMBLY__ */
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#endif /* __ASM_BARRIER_H */
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