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50f5ef466d
- Use the new "altr,socfpga-stmmac-a10-s10" for the EMAC controllers on Arria10/Stratix10 - Add the ltc2497 i2c entry on the Arria10 devkit - Add the EMAC OCP reset property on the Arria10 -----BEGIN PGP SIGNATURE----- iQJIBAABCgAyFiEEoHhMeiyk5VmwVMwNGZQEC4GjKPQFAlz+d5oUHGRpbmd1eWVu QGtlcm5lbC5vcmcACgkQGZQEC4GjKPSl9g/8DvMqBsyvtoNJwqkEiZXjjBecjMBW rN1O226DtbhHbaDA595vZE5U/va9fx+QVVEfxIT22r31BQ9b8c7RKWtly5DD3Il/ VIZ5JvUXmXvc/uDHDntRGbWmRbDmU8VEEjzzaGuGI5j4+dKhvy27jdRcqJLBKtdI 9cfdDv2Tqh047FuUDs2Q7PwrhBktPEJrvnAUmpBv+BBc/eRkzOz7QaAjTVgfO85E WBBocEc1Zi/VjJzHGY4bGrmmf3CFriC+eO4lnuoBO+o1heNdBM97QB4cUHdfZ6/t UCrNzrkvksMmFOyEuJbZahQ/rRhunBSK6LyfPtLWhEMxxkJXO7DxuUuMnsBsZuR8 64QrRKuXzrHqk18p805LQiqQupJn4WfkK3/r4qlNSD7mdFTshHOGynQ7HAJunbT9 pplYHF7bhMjskeeOW6FipWGPFUFn1MbYOgM8weZ7I+9+TKj5H3BxYKhpt90ae5Lu cS1uk2bkDemSt9o6xzzb/xdBSRgzxGE5agYuUzuLwTK2SK6SlQZ/IZwwMu9GXEwh rA4Wjg4LliEk/LEGEcwcosB6OalCuLCIa0ywnn9WOZMOHJCBPwoWtgJyeWEvPYiD e1Oh/yBNOiOfnKi3bw3EvnwstTNzIaWqI12qO1BIJ1JEwSgC/rDy6P7eQQ8WMfBM Im7ivw8tfEj/6Ik= =22jl -----END PGP SIGNATURE----- Merge tag 'socfpga_dts_updates_for_v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/dt SoCFPGA DTS updates for v5.3 - Use the new "altr,socfpga-stmmac-a10-s10" for the EMAC controllers on Arria10/Stratix10 - Add the ltc2497 i2c entry on the Arria10 devkit - Add the EMAC OCP reset property on the Arria10 * tag 'socfpga_dts_updates_for_v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: ARM: dts: arria10: Add EMAC OCP reset property ARM: dts: socfpga: add ltc2497 on arria10 devkit arm64: dts: stratix10: use the "altr,socfpga-stmmac-a10-s10" binding ARM: dts: socfpga: use the "altr,socfpga-stmmac-a10-s10" binding Signed-off-by: Olof Johansson <olof@lixom.net> |
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Makefile | ||
socfpga_stratix10_socdk.dts | ||
socfpga_stratix10.dtsi |