mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-15 17:56:42 +07:00
8582a03e02
This driver explains too much about what is apparent from the code. Comments around basic APIs such as init_completion(), spin_lock_init(), etc. seem unneeded lessons to kernel developers. (With those comments dropped, denali_drv_init() is small enough, so it has been merged into the probe function.) Also, NAND driver developers should know the NAND init procedure, so there is no need to explain nand_scan_ident/tail. I removed FSF's address from the license blocks, and added simple comments to struct members. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
164 lines
4.0 KiB
C
164 lines
4.0 KiB
C
/*
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* NAND Flash Controller Device Driver for DT
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*
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* Copyright © 2011, Picochip.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/ioport.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include "denali.h"
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struct denali_dt {
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struct denali_nand_info denali;
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struct clk *clk;
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};
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struct denali_dt_data {
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unsigned int revision;
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unsigned int caps;
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const struct nand_ecc_caps *ecc_caps;
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};
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NAND_ECC_CAPS_SINGLE(denali_socfpga_ecc_caps, denali_calc_ecc_bytes,
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512, 8, 15);
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static const struct denali_dt_data denali_socfpga_data = {
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.caps = DENALI_CAP_HW_ECC_FIXUP,
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.ecc_caps = &denali_socfpga_ecc_caps,
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};
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NAND_ECC_CAPS_SINGLE(denali_uniphier_v5a_ecc_caps, denali_calc_ecc_bytes,
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1024, 8, 16, 24);
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static const struct denali_dt_data denali_uniphier_v5a_data = {
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.caps = DENALI_CAP_HW_ECC_FIXUP |
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DENALI_CAP_DMA_64BIT,
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.ecc_caps = &denali_uniphier_v5a_ecc_caps,
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};
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NAND_ECC_CAPS_SINGLE(denali_uniphier_v5b_ecc_caps, denali_calc_ecc_bytes,
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1024, 8, 16);
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static const struct denali_dt_data denali_uniphier_v5b_data = {
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.revision = 0x0501,
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.caps = DENALI_CAP_HW_ECC_FIXUP |
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DENALI_CAP_DMA_64BIT,
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.ecc_caps = &denali_uniphier_v5b_ecc_caps,
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};
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static const struct of_device_id denali_nand_dt_ids[] = {
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{
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.compatible = "altr,socfpga-denali-nand",
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.data = &denali_socfpga_data,
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},
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{
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.compatible = "socionext,uniphier-denali-nand-v5a",
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.data = &denali_uniphier_v5a_data,
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},
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{
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.compatible = "socionext,uniphier-denali-nand-v5b",
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.data = &denali_uniphier_v5b_data,
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},
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, denali_nand_dt_ids);
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static int denali_dt_probe(struct platform_device *pdev)
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{
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struct resource *res;
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struct denali_dt *dt;
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const struct denali_dt_data *data;
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struct denali_nand_info *denali;
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int ret;
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dt = devm_kzalloc(&pdev->dev, sizeof(*dt), GFP_KERNEL);
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if (!dt)
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return -ENOMEM;
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denali = &dt->denali;
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data = of_device_get_match_data(&pdev->dev);
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if (data) {
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denali->revision = data->revision;
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denali->caps = data->caps;
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denali->ecc_caps = data->ecc_caps;
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}
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denali->dev = &pdev->dev;
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denali->irq = platform_get_irq(pdev, 0);
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if (denali->irq < 0) {
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dev_err(&pdev->dev, "no irq defined\n");
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return denali->irq;
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}
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "denali_reg");
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denali->reg = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(denali->reg))
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return PTR_ERR(denali->reg);
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "nand_data");
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denali->host = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(denali->host))
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return PTR_ERR(denali->host);
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dt->clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(dt->clk)) {
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dev_err(&pdev->dev, "no clk available\n");
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return PTR_ERR(dt->clk);
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}
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ret = clk_prepare_enable(dt->clk);
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if (ret)
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return ret;
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denali->clk_x_rate = clk_get_rate(dt->clk);
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ret = denali_init(denali);
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if (ret)
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goto out_disable_clk;
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platform_set_drvdata(pdev, dt);
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return 0;
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out_disable_clk:
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clk_disable_unprepare(dt->clk);
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return ret;
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}
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static int denali_dt_remove(struct platform_device *pdev)
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{
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struct denali_dt *dt = platform_get_drvdata(pdev);
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denali_remove(&dt->denali);
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clk_disable_unprepare(dt->clk);
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return 0;
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}
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static struct platform_driver denali_dt_driver = {
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.probe = denali_dt_probe,
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.remove = denali_dt_remove,
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.driver = {
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.name = "denali-nand-dt",
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.of_match_table = denali_nand_dt_ids,
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},
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};
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module_platform_driver(denali_dt_driver);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Jamie Iles");
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MODULE_DESCRIPTION("DT driver for Denali NAND controller");
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