Jintack Lim 7b6b46311a KVM: arm/arm64: Emulate the EL1 phys timer registers ... Emulate read and write operations to CNTP_TVAL, CNTP_CVAL and CNTP_CTL. Now VMs are able to use the EL1 physical timer. Signed-off-by: Jintack Lim <jintack@cs.columbia.edu> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>		2017-02-08 15:13:37 +00:00
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hyp	KVM: arm/arm64: Move cntvoff to each timer context	2017-02-08 15:13:33 +00:00
vgic	KVM: arm/arm64: vgic: Stop injecting the MSI occurrence twice	2017-02-08 15:13:14 +00:00
aarch32.c	arm64: KVM: Make kvm_skip_instr32 available to HYP	2016-09-08 12:53:00 +02:00
arch_timer.c	KVM: arm/arm64: Emulate the EL1 phys timer registers	2017-02-08 15:13:37 +00:00
pmu.c	KVM: arm64: Fix the issues when guest PMCCFILTR is configured	2016-11-18 09:06:58 +00:00
trace.h	arm/arm64: KVM: Add tracepoints for vgic and timer	2015-10-22 23:01:48 +02:00