Marek Szyprowski 28b676329c drm/exynos: gsc: Increase Exynos5433 buffer width alignment to 16 pixels ... Investigation revealed that GScaler hardware requires the real buffer width (pitch) to be aligned to 16 pixels. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>		2018-06-29 18:02:57 +09:00
..
drm	drm/exynos: gsc: Increase Exynos5433 buffer width alignment to 16 pixels	2018-06-29 18:02:57 +09:00
host1x	drm for v4.18-rc1	2018-06-06 08:16:33 -07:00
ipu-v3
vga	docs: Fix some broken references	2018-06-15 18:10:01 -03:00
Makefile