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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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281b05392f
These changes are all specific to an soc family or the code for one soc. Lots of work for Tegra3 this time, but also a lot of other platforms. There will be another (smaller) set of soc patches later in the merge window for stuff that has dependencies on external trees or that was sent just before the merge window opened. The asoc tree added a few devices to the i.mx platform, which conflict with other devices added in the same place here. The tegra Makefile conflicts between a number of branches, mostly because of changes regarding localtimer.c, which was removed in the end. Signed-off-by: Arnd Bergmann <arnd@arndb.de> -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIVAwUAT24+62CrR//JCVInAQLQBQ/8ClDSFYKTkh3XuzryyO3xkiuuj9wp3/av oEzro6HmSFDeWlqyQYYM9nKn6n3zFyyumG7oHt3OyRwrtV742rMOpTK+/Ntj2lFB xUVwKQfu2gEMHvwca3VoXia/pX7knvedEf9bNjeCznkKxQCKCArK2821/2UDGhwx L3/lD70AhpfK0DInNr6HusnZG2pzCdV1tLXUvgs08I68wL7Ps1TDPOLLyTo9dAgf k+E1cpRNLahyiVUBfnp+n3Dg0T+/7iD6zrR7bE9i/zhv6XUcLPt2K5XqYnPuQvzK sHIG8zROmNWzaIzgwYVpJAofi0SHq1OjvA7RtepOq/pGe5QvB9y1RISlpwzBr6Fh 4yuBkeN/Azk0xSHw5w++8L4y/oSSNhB9OWgIZGChZMW33bnHyiZW9mDFJ/PyWD0F kRl++tTuQqDvT5Wx4DXX8RGekIiFq48+MMx3yJjuGarmVsPEvShQCf8TkBbl/KQY /AEXMJTaVTED0R/q+NOY/r4oMFC4JtAVo1ZtTga+N5cYWQCwI9HVSgAKw84Yc1Hj h9r7XjDhmGYFWMfWe9V5NtFNmXl6tAo66fMzSG6+9k+UEXiF1WrhnzBuks5zFU7z z4WBRL0GmaNBdq58dJoM4lucnuhhQk2m7wz5Lt4o17enw0dAfSXQMstDMnbE7c51 65yZh8o9mxs= =WdYR -----END PGP SIGNATURE----- Merge tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull "ARM: SoC specific updates" from Arnd Bergmann: "These changes are all specific to an soc family or the code for one soc. Lots of work for Tegra3 this time, but also a lot of other platforms. There will be another (smaller) set of soc patches later in the merge window for stuff that has dependencies on external trees or that was sent just before the merge window opened. The asoc tree added a few devices to the i.mx platform, which conflict with other devices added in the same place here. The tegra Makefile conflicts between a number of branches, mostly because of changes regarding localtimer.c, which was removed in the end. Signed-off-by: Arnd Bergmann <arnd@arndb.de>" Fix up some trivial conflicts, including the mentioned Tegra Makefile. * tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (51 commits) ARM: EXYNOS: fix cycle count for periodic mode of clock event timers ARM: EXYNOS: add support JPEG ARM: EXYNOS: Add DMC1, allow PPMU access for DMC ARM: SAMSUNG: Correct MIPI-CSIS io memory resource definition ARM: SAMSUNG: fix __init attribute on regarding s3c_set_platdata() ARM: SAMSUNG: Add __init attribute to samsung_bl_set() ARM: S5PV210: Add usb otg phy control ARM: S3C64XX: Add usb otg phy control ARM: EXYNOS: Enable l2 configuration through device tree ARM: EXYNOS: remove useless code to save/restore L2 ARM: EXYNOS: save L2 settings during bootup ARM: S5P: add L2 early resume code ARM: EXYNOS: Add support AFTR mode on EXYNOS4210 ARM: mx35: Setup the AIPS registers ARM: mx5: Use common function for configuring AIPS ARM: mx3: Setup AIPS registers ARM: mx3: Let mx31 and mx35 enter in LPM mode in WFI ARM: defconfig: imx_v6_v7: build in REGULATOR_FIXED_VOLTAGE ARM: imx: update imx_v6_v7_defconfig ARM: tegra: Demote EMC clock inconsistency BUG to WARN ...
111 lines
2.7 KiB
C
111 lines
2.7 KiB
C
/*
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* arch/arm/mach-tegra/common.c
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*
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* Copyright (C) 2010 Google, Inc.
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*
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* Author:
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* Colin Cross <ccross@android.com>
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/of_irq.h>
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#include <asm/hardware/cache-l2x0.h>
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#include <asm/hardware/gic.h>
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#include <mach/iomap.h>
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#include "board.h"
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#include "clock.h"
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#include "fuse.h"
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#ifdef CONFIG_OF
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static const struct of_device_id tegra_dt_irq_match[] __initconst = {
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{ .compatible = "arm,cortex-a9-gic", .data = gic_of_init },
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{ }
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};
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void __init tegra_dt_init_irq(void)
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{
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tegra_init_irq();
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of_irq_init(tegra_dt_irq_match);
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}
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#endif
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void tegra_assert_system_reset(char mode, const char *cmd)
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{
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void __iomem *reset = IO_ADDRESS(TEGRA_PMC_BASE + 0);
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u32 reg;
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reg = readl_relaxed(reset);
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reg |= 0x10;
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writel_relaxed(reg, reset);
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}
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#ifdef CONFIG_ARCH_TEGRA_2x_SOC
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static __initdata struct tegra_clk_init_table tegra20_clk_init_table[] = {
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/* name parent rate enabled */
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{ "clk_m", NULL, 0, true },
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{ "pll_p", "clk_m", 216000000, true },
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{ "pll_p_out1", "pll_p", 28800000, true },
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{ "pll_p_out2", "pll_p", 48000000, true },
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{ "pll_p_out3", "pll_p", 72000000, true },
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{ "pll_p_out4", "pll_p", 108000000, true },
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{ "sclk", "pll_p_out4", 108000000, true },
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{ "hclk", "sclk", 108000000, true },
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{ "pclk", "hclk", 54000000, true },
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{ "csite", NULL, 0, true },
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{ "emc", NULL, 0, true },
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{ "cpu", NULL, 0, true },
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{ NULL, NULL, 0, 0},
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};
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#endif
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static void __init tegra_init_cache(u32 tag_latency, u32 data_latency)
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{
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#ifdef CONFIG_CACHE_L2X0
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void __iomem *p = IO_ADDRESS(TEGRA_ARM_PERIF_BASE) + 0x3000;
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u32 aux_ctrl, cache_type;
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writel_relaxed(tag_latency, p + L2X0_TAG_LATENCY_CTRL);
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writel_relaxed(data_latency, p + L2X0_DATA_LATENCY_CTRL);
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cache_type = readl(p + L2X0_CACHE_TYPE);
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aux_ctrl = (cache_type & 0x700) << (17-8);
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aux_ctrl |= 0x6C000001;
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l2x0_init(p, aux_ctrl, 0x8200c3fe);
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#endif
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}
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#ifdef CONFIG_ARCH_TEGRA_2x_SOC
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void __init tegra20_init_early(void)
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{
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tegra_init_fuse();
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tegra2_init_clocks();
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tegra_clk_init_from_table(tegra20_clk_init_table);
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tegra_init_cache(0x331, 0x441);
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}
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#endif
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#ifdef CONFIG_ARCH_TEGRA_3x_SOC
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void __init tegra30_init_early(void)
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{
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tegra30_init_clocks();
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tegra_init_cache(0x441, 0x551);
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}
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#endif
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