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bd94c4077a
Currently, 8-bit (MMIO) and 32-bit (MMIO32) register interfaces are supported for the 8250 console, but the 16-bit (MMIO16) is not. The 8250 UART device on my board is connected to a 16-bit bus and my main motivation is to use earlycon with it. (Refer to arch/arm/boot/dts/uniphier-support-card.dtsi) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Peter Hurley <peter@hurleysoftware.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
132 lines
3.2 KiB
C
132 lines
3.2 KiB
C
/*
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* include/linux/serial.h
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*
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* Copyright (C) 1992 by Theodore Ts'o.
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*
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* Redistribution of this file is permitted under the terms of the GNU
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* Public License (GPL)
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*/
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#ifndef _UAPI_LINUX_SERIAL_H
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#define _UAPI_LINUX_SERIAL_H
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#include <linux/types.h>
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#include <linux/tty_flags.h>
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struct serial_struct {
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int type;
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int line;
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unsigned int port;
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int irq;
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int flags;
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int xmit_fifo_size;
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int custom_divisor;
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int baud_base;
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unsigned short close_delay;
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char io_type;
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char reserved_char[1];
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int hub6;
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unsigned short closing_wait; /* time to wait before closing */
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unsigned short closing_wait2; /* no longer used... */
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unsigned char *iomem_base;
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unsigned short iomem_reg_shift;
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unsigned int port_high;
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unsigned long iomap_base; /* cookie passed into ioremap */
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};
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/*
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* For the close wait times, 0 means wait forever for serial port to
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* flush its output. 65535 means don't wait at all.
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*/
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#define ASYNC_CLOSING_WAIT_INF 0
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#define ASYNC_CLOSING_WAIT_NONE 65535
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/*
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* These are the supported serial types.
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*/
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#define PORT_UNKNOWN 0
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#define PORT_8250 1
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#define PORT_16450 2
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#define PORT_16550 3
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#define PORT_16550A 4
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#define PORT_CIRRUS 5 /* usurped by cyclades.c */
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#define PORT_16650 6
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#define PORT_16650V2 7
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#define PORT_16750 8
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#define PORT_STARTECH 9 /* usurped by cyclades.c */
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#define PORT_16C950 10 /* Oxford Semiconductor */
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#define PORT_16654 11
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#define PORT_16850 12
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#define PORT_RSA 13 /* RSA-DV II/S card */
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#define PORT_MAX 13
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#define SERIAL_IO_PORT 0
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#define SERIAL_IO_HUB6 1
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#define SERIAL_IO_MEM 2
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#define SERIAL_IO_MEM32 3
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#define SERIAL_IO_AU 4
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#define SERIAL_IO_TSI 5
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#define SERIAL_IO_MEM32BE 6
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#define SERIAL_IO_MEM16 7
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#define UART_CLEAR_FIFO 0x01
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#define UART_USE_FIFO 0x02
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#define UART_STARTECH 0x04
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#define UART_NATSEMI 0x08
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/*
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* Multiport serial configuration structure --- external structure
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*/
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struct serial_multiport_struct {
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int irq;
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int port1;
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unsigned char mask1, match1;
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int port2;
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unsigned char mask2, match2;
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int port3;
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unsigned char mask3, match3;
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int port4;
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unsigned char mask4, match4;
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int port_monitor;
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int reserved[32];
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};
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/*
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* Serial input interrupt line counters -- external structure
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* Four lines can interrupt: CTS, DSR, RI, DCD
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*/
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struct serial_icounter_struct {
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int cts, dsr, rng, dcd;
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int rx, tx;
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int frame, overrun, parity, brk;
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int buf_overrun;
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int reserved[9];
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};
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/*
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* Serial interface for controlling RS485 settings on chips with suitable
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* support. Set with TIOCSRS485 and get with TIOCGRS485 if supported by your
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* platform. The set function returns the new state, with any unsupported bits
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* reverted appropriately.
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*/
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struct serial_rs485 {
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__u32 flags; /* RS485 feature flags */
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#define SER_RS485_ENABLED (1 << 0) /* If enabled */
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#define SER_RS485_RTS_ON_SEND (1 << 1) /* Logical level for
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RTS pin when
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sending */
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#define SER_RS485_RTS_AFTER_SEND (1 << 2) /* Logical level for
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RTS pin after sent*/
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#define SER_RS485_RX_DURING_TX (1 << 4)
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__u32 delay_rts_before_send; /* Delay before send (milliseconds) */
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__u32 delay_rts_after_send; /* Delay after send (milliseconds) */
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__u32 padding[5]; /* Memory is cheap, new structs
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are a royal PITA .. */
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};
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#endif /* _UAPI_LINUX_SERIAL_H */
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