Steven Price 275fa0ea2c arm64: Workaround for Cortex-A55 erratum 1530923 ... Cortex-A55 erratum 1530923 allows TLB entries to be allocated as a result of a speculative AT instruction. This may happen in the middle of a guest world switch while the relevant VMSA configuration is in an inconsistent state, leading to erroneous content being allocated into TLBs. The same workaround as is used for Cortex-A76 erratum 1165522 (WORKAROUND_SPECULATIVE_AT_VHE) can be used here. Note that this mandates the use of VHE on affected parts. Acked-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Steven Price <steven.price@arm.com> Signed-off-by: Will Deacon <will@kernel.org>		2020-01-16 10:44:14 +00:00
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debug-sr.c	arm64: KVM: hyp: debug-sr: Mark expected switch fall-through	2019-07-29 11:01:37 +01:00
entry.S	KVM: arm64: Skip more of the SError vaxorcism	2019-07-05 13:03:34 +01:00
fpsimd.S	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234	2019-06-19 17:09:07 +02:00
hyp-entry.S	KVM: arm64: Consume pending SError as early as possible	2019-07-05 13:03:29 +01:00
Makefile	KVM: arm/arm64: Move cc/it checks under hyp's Makefile to avoid instrumentation	2019-05-24 14:53:20 +01:00
switch.c	arm64: Workaround for Cortex-A55 erratum 1530923	2020-01-16 10:44:14 +00:00
sysreg-sr.c	arm64: Rename WORKAROUND_1319367 to SPECULATIVE_AT_NVHE	2020-01-16 10:44:11 +00:00
tlb.c	arm64: Workaround for Cortex-A55 erratum 1530923	2020-01-16 10:44:14 +00:00
vgic-v2-cpuif-proxy.c	KVM: arm64: Migrate _elx sysreg accessors to msr_s/mrs_s	2019-07-05 13:57:25 +01:00