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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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32a1795f57
This patch adds a new DRM driver for Texas Instruments DSS IPs used on
Texas Instruments Keystone K2G, AM65x, and J721e SoCs. The new DSS IP is
a major change to the older DSS IP versions, which are supported by
the omapdrm driver. While on higher level the Keystone DSS resembles
the older DSS versions, the registers are completely different and the
internal pipelines differ a lot.
DSS IP found on K2G is an "ultra-light" version, and has only a single
plane and a single output. The K3 DSS IPs are found on AM65x and J721E
SoCs. AM65x DSS has two video ports, one full video plane, and another
"lite" plane without scaling support. J721E has 4 video ports, 2 video
planes and 2 lite planes. AM65x DSS has also an integrated OLDI (LVDS)
output.
Version history:
v2: - rebased on top of drm-next-2019-11-27
- sort all include lines in all files
- remove all include <drm/drmP.h>
- remove select "select VIDEOMODE_HELPERS"
- call dispc_vp_setup() later in tidss_crtc_atomic_flush() (there is no
to call it in new modeset case as it is also called in vp_enable())
- change probe sequence and drm_device allocation (follow example in
drm_drv.c)
- use __maybe_unused instead of #ifdef for pm functions
- remove "struct drm_fbdev_cma *fbdev;" from driver data
- check panel connector type before connecting it
v3: no change
v4: no change
v5: - remove fifo underflow irq handling, it is not an error and
it should be used for debug purposes only
- memory tuning, prefetch plane fifo up to high-threshold value to
minimize possibility of underflows.
v6: - Check CTM and gamma support from dispc_features when creating crtc
- Implement CTM support for k2g and fix k3 CTM implementation
- Remove gamma property persistence and always write color properties
in a new modeset
v7: - Fix checkpatch.pl --strict issues
- Rebase on top of drm-misc-next-2020-01-10
v8: - Remove idle debug prints from dispc_init()
- Add Reviewed-by: Benoit Parrot <bparrot@ti.com>
v9: - Rename dispc_write_irqenable() to dispc_set_irqenable() to avoid
conflict exported omapfb function with same name
- Add Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Co-developed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Reviewed-by: Benoit Parrot <bparrot@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Link: https://patchwork.freedesktop.org/patch/msgid/925fbfad58ff828e8e07fdff7073a0ee65750c3d.1580129724.git.jsarha@ti.com
78 lines
2.3 KiB
C
78 lines
2.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
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* Author: Tomi Valkeinen <tomi.valkeinen@ti.com>
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*/
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#ifndef __TIDSS_IRQ_H__
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#define __TIDSS_IRQ_H__
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#include <linux/types.h>
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#include "tidss_drv.h"
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/*
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* The IRQ status from various DISPC IRQ registers are packed into a single
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* value, where the bits are defined as follows:
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*
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* bit group |dev|wb |mrg0|mrg1|mrg2|mrg3|plane0-3| <unused> |
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* bit use |D |fou|FEOL|FEOL|FEOL|FEOL| UUUU | |
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* bit number|0 |1-3|4-7 |8-11| 12-19 | 20-23 | 24-31 |
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*
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* device bits: D = OCP error
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* WB bits: f = frame done wb, o = wb buffer overflow,
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* u = wb buffer uncomplete
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* vp bits: F = frame done, E = vsync even, O = vsync odd, L = sync lost
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* plane bits: U = fifo underflow
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*/
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#define DSS_IRQ_DEVICE_OCP_ERR BIT(0)
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#define DSS_IRQ_DEVICE_FRAMEDONEWB BIT(1)
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#define DSS_IRQ_DEVICE_WBBUFFEROVERFLOW BIT(2)
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#define DSS_IRQ_DEVICE_WBUNCOMPLETEERROR BIT(3)
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#define DSS_IRQ_DEVICE_WB_MASK GENMASK(3, 1)
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#define DSS_IRQ_VP_BIT_N(ch, bit) (4 + 4 * (ch) + (bit))
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#define DSS_IRQ_PLANE_BIT_N(plane, bit) \
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(DSS_IRQ_VP_BIT_N(TIDSS_MAX_PORTS, 0) + 1 * (plane) + (bit))
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#define DSS_IRQ_VP_BIT(ch, bit) BIT(DSS_IRQ_VP_BIT_N((ch), (bit)))
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#define DSS_IRQ_PLANE_BIT(plane, bit) \
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BIT(DSS_IRQ_PLANE_BIT_N((plane), (bit)))
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static inline dispc_irq_t DSS_IRQ_VP_MASK(u32 ch)
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{
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return GENMASK(DSS_IRQ_VP_BIT_N((ch), 3), DSS_IRQ_VP_BIT_N((ch), 0));
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}
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static inline dispc_irq_t DSS_IRQ_PLANE_MASK(u32 plane)
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{
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return GENMASK(DSS_IRQ_PLANE_BIT_N((plane), 0),
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DSS_IRQ_PLANE_BIT_N((plane), 0));
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}
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#define DSS_IRQ_VP_FRAME_DONE(ch) DSS_IRQ_VP_BIT((ch), 0)
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#define DSS_IRQ_VP_VSYNC_EVEN(ch) DSS_IRQ_VP_BIT((ch), 1)
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#define DSS_IRQ_VP_VSYNC_ODD(ch) DSS_IRQ_VP_BIT((ch), 2)
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#define DSS_IRQ_VP_SYNC_LOST(ch) DSS_IRQ_VP_BIT((ch), 3)
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#define DSS_IRQ_PLANE_FIFO_UNDERFLOW(plane) DSS_IRQ_PLANE_BIT((plane), 0)
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struct drm_crtc;
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struct drm_device;
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struct tidss_device;
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void tidss_irq_enable_vblank(struct drm_crtc *crtc);
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void tidss_irq_disable_vblank(struct drm_crtc *crtc);
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void tidss_irq_preinstall(struct drm_device *ddev);
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int tidss_irq_postinstall(struct drm_device *ddev);
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void tidss_irq_uninstall(struct drm_device *ddev);
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irqreturn_t tidss_irq_handler(int irq, void *arg);
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void tidss_irq_resume(struct tidss_device *tidss);
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#endif
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