mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-16 00:46:47 +07:00
ceed5f30bf
A future commit will add locking to the DRM's channel, and there's numerous problems that come up if we allow printk from an interrupt context to be accelerated. It seems saner to just disallow it completely. As a nice side-effect, all the "to accel or not to accel" logic gets moved out of the chipset-specific code. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
248 lines
6.1 KiB
C
248 lines
6.1 KiB
C
#include "drmP.h"
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#include "nouveau_drv.h"
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#include "nouveau_dma.h"
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#include "nouveau_ramht.h"
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#include "nouveau_fbcon.h"
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int
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nv50_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
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{
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struct nouveau_fbdev *nfbdev = info->par;
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struct drm_device *dev = nfbdev->dev;
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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struct nouveau_channel *chan = dev_priv->channel;
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int ret;
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ret = RING_SPACE(chan, rect->rop == ROP_COPY ? 7 : 11);
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if (ret)
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return ret;
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if (rect->rop != ROP_COPY) {
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BEGIN_RING(chan, NvSub2D, 0x02ac, 1);
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OUT_RING(chan, 1);
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}
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BEGIN_RING(chan, NvSub2D, 0x0588, 1);
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if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
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info->fix.visual == FB_VISUAL_DIRECTCOLOR)
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OUT_RING(chan, ((uint32_t *)info->pseudo_palette)[rect->color]);
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else
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OUT_RING(chan, rect->color);
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BEGIN_RING(chan, NvSub2D, 0x0600, 4);
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OUT_RING(chan, rect->dx);
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OUT_RING(chan, rect->dy);
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OUT_RING(chan, rect->dx + rect->width);
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OUT_RING(chan, rect->dy + rect->height);
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if (rect->rop != ROP_COPY) {
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BEGIN_RING(chan, NvSub2D, 0x02ac, 1);
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OUT_RING(chan, 3);
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}
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FIRE_RING(chan);
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return 0;
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}
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int
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nv50_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region)
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{
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struct nouveau_fbdev *nfbdev = info->par;
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struct drm_device *dev = nfbdev->dev;
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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struct nouveau_channel *chan = dev_priv->channel;
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int ret;
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ret = RING_SPACE(chan, 12);
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if (ret)
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return ret;
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BEGIN_RING(chan, NvSub2D, 0x0110, 1);
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OUT_RING(chan, 0);
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BEGIN_RING(chan, NvSub2D, 0x08b0, 4);
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OUT_RING(chan, region->dx);
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OUT_RING(chan, region->dy);
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OUT_RING(chan, region->width);
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OUT_RING(chan, region->height);
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BEGIN_RING(chan, NvSub2D, 0x08d0, 4);
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OUT_RING(chan, 0);
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OUT_RING(chan, region->sx);
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OUT_RING(chan, 0);
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OUT_RING(chan, region->sy);
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FIRE_RING(chan);
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return 0;
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}
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int
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nv50_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
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{
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struct nouveau_fbdev *nfbdev = info->par;
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struct drm_device *dev = nfbdev->dev;
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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struct nouveau_channel *chan = dev_priv->channel;
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uint32_t width, dwords, *data = (uint32_t *)image->data;
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uint32_t mask = ~(~0 >> (32 - info->var.bits_per_pixel));
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uint32_t *palette = info->pseudo_palette;
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int ret;
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if (image->depth != 1)
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return -ENODEV;
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ret = RING_SPACE(chan, 11);
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if (ret)
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return ret;
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width = ALIGN(image->width, 32);
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dwords = (width * image->height) >> 5;
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BEGIN_RING(chan, NvSub2D, 0x0814, 2);
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if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
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info->fix.visual == FB_VISUAL_DIRECTCOLOR) {
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OUT_RING(chan, palette[image->bg_color] | mask);
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OUT_RING(chan, palette[image->fg_color] | mask);
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} else {
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OUT_RING(chan, image->bg_color);
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OUT_RING(chan, image->fg_color);
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}
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BEGIN_RING(chan, NvSub2D, 0x0838, 2);
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OUT_RING(chan, image->width);
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OUT_RING(chan, image->height);
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BEGIN_RING(chan, NvSub2D, 0x0850, 4);
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OUT_RING(chan, 0);
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OUT_RING(chan, image->dx);
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OUT_RING(chan, 0);
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OUT_RING(chan, image->dy);
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while (dwords) {
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int push = dwords > 2047 ? 2047 : dwords;
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ret = RING_SPACE(chan, push + 1);
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if (ret)
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return ret;
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dwords -= push;
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BEGIN_RING(chan, NvSub2D, 0x40000860, push);
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OUT_RINGp(chan, data, push);
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data += push;
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}
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FIRE_RING(chan);
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return 0;
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}
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int
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nv50_fbcon_accel_init(struct fb_info *info)
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{
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struct nouveau_fbdev *nfbdev = info->par;
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struct drm_device *dev = nfbdev->dev;
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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struct nouveau_channel *chan = dev_priv->channel;
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struct nouveau_gpuobj *eng2d = NULL;
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uint64_t fb;
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int ret, format;
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fb = info->fix.smem_start - dev_priv->fb_phys + dev_priv->vm_vram_base;
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switch (info->var.bits_per_pixel) {
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case 8:
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format = 0xf3;
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break;
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case 15:
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format = 0xf8;
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break;
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case 16:
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format = 0xe8;
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break;
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case 32:
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switch (info->var.transp.length) {
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case 0: /* depth 24 */
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case 8: /* depth 32, just use 24.. */
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format = 0xe6;
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break;
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case 2: /* depth 30 */
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format = 0xd1;
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break;
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default:
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return -EINVAL;
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}
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break;
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default:
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return -EINVAL;
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}
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ret = nouveau_gpuobj_gr_new(dev_priv->channel, 0x502d, &eng2d);
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if (ret)
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return ret;
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ret = nouveau_ramht_insert(dev_priv->channel, Nv2D, eng2d);
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nouveau_gpuobj_ref(NULL, &eng2d);
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if (ret)
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return ret;
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ret = RING_SPACE(chan, 59);
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if (ret) {
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nouveau_fbcon_gpu_lockup(info);
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return ret;
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}
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BEGIN_RING(chan, NvSub2D, 0x0000, 1);
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OUT_RING(chan, Nv2D);
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BEGIN_RING(chan, NvSub2D, 0x0180, 4);
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OUT_RING(chan, NvNotify0);
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OUT_RING(chan, chan->vram_handle);
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OUT_RING(chan, chan->vram_handle);
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OUT_RING(chan, chan->vram_handle);
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BEGIN_RING(chan, NvSub2D, 0x0290, 1);
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OUT_RING(chan, 0);
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BEGIN_RING(chan, NvSub2D, 0x0888, 1);
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OUT_RING(chan, 1);
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BEGIN_RING(chan, NvSub2D, 0x02ac, 1);
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OUT_RING(chan, 3);
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BEGIN_RING(chan, NvSub2D, 0x02a0, 1);
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OUT_RING(chan, 0x55);
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BEGIN_RING(chan, NvSub2D, 0x08c0, 4);
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OUT_RING(chan, 0);
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OUT_RING(chan, 1);
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OUT_RING(chan, 0);
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OUT_RING(chan, 1);
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BEGIN_RING(chan, NvSub2D, 0x0580, 2);
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OUT_RING(chan, 4);
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OUT_RING(chan, format);
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BEGIN_RING(chan, NvSub2D, 0x02e8, 2);
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OUT_RING(chan, 2);
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OUT_RING(chan, 1);
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BEGIN_RING(chan, NvSub2D, 0x0804, 1);
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OUT_RING(chan, format);
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BEGIN_RING(chan, NvSub2D, 0x0800, 1);
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OUT_RING(chan, 1);
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BEGIN_RING(chan, NvSub2D, 0x0808, 3);
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OUT_RING(chan, 0);
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OUT_RING(chan, 0);
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OUT_RING(chan, 1);
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BEGIN_RING(chan, NvSub2D, 0x081c, 1);
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OUT_RING(chan, 1);
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BEGIN_RING(chan, NvSub2D, 0x0840, 4);
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OUT_RING(chan, 0);
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OUT_RING(chan, 1);
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OUT_RING(chan, 0);
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OUT_RING(chan, 1);
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BEGIN_RING(chan, NvSub2D, 0x0200, 2);
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OUT_RING(chan, format);
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OUT_RING(chan, 1);
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BEGIN_RING(chan, NvSub2D, 0x0214, 5);
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OUT_RING(chan, info->fix.line_length);
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OUT_RING(chan, info->var.xres_virtual);
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OUT_RING(chan, info->var.yres_virtual);
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OUT_RING(chan, upper_32_bits(fb));
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OUT_RING(chan, lower_32_bits(fb));
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BEGIN_RING(chan, NvSub2D, 0x0230, 2);
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OUT_RING(chan, format);
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OUT_RING(chan, 1);
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BEGIN_RING(chan, NvSub2D, 0x0244, 5);
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OUT_RING(chan, info->fix.line_length);
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OUT_RING(chan, info->var.xres_virtual);
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OUT_RING(chan, info->var.yres_virtual);
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OUT_RING(chan, upper_32_bits(fb));
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OUT_RING(chan, lower_32_bits(fb));
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return 0;
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}
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