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274c7c3638
Make sure that the irq is not in progress after stop. This means two things: - ensure the intr setting register is set by flushing posted values - call synchronize_irq() after that Also flush stop tx write, inform callers of the tx stop about still pending transfers (unsuccessful stop) and finally don't wait another 3ms in ath5k_rx_stop, since ath5k_hw_stop_rx_dma ensures transfer to be finished. Make sure all writes will be ordered in respect to locks by mmiowb(). Signed-off-by: Jiri Slaby <jirislaby@gmail.com> Acked-by: Nick Kossifidis <mickflemm@gmail.com> Cc: Luis R. Rodriguez <mcgrof@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com> |
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| .. | ||
| ath5k.h | ||
| base.c | ||
| base.h | ||
| debug.c | ||
| debug.h | ||
| hw.c | ||
| hw.h | ||
| initvals.c | ||
| Kconfig | ||
| Makefile | ||
| phy.c | ||
| reg.h | ||