mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-13 19:56:41 +07:00
5ec17af7ea
The Intel EG20T Platform Controller Hub used on the MIPS Boston
development board supports prefetching memory to optimize DMA transfers.
Unfortunately for unknown reasons this doesn't work well with some MIPS
CPUs such as the P6600, particularly when using an I/O Coherence Unit
(IOCU) to provide cache-coherent DMA. In these systems it is common for
DMA data to be lost, resulting in broken access to EG20T devices such as
the MMC or SATA controllers.
Support for a DT property to configure the prefetching was added a while
back by commit
|
||
---|---|---|
.. | ||
brcm | ||
cavium-octeon | ||
img | ||
ingenic | ||
lantiq | ||
mscc | ||
mti | ||
netlogic | ||
ni | ||
pic32 | ||
qca | ||
ralink | ||
xilfpga | ||
Makefile |