mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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5daa3ba0c6
Fix some outstanding issues with the pxa2xx_spi driver when running on a PXA270: - Wrong timeout calculation in the setup function due to different peripheral clock rates in the PXAxxx family. - Bad handling of SSSR_TFS interrupts in interrupt_transfer function. - Added locking to interface between the pump_messages workqueue and the pump_transfers tasklet. Much thanks to Juergen Beisert for the extensive testing on the PXA270. Signed-off-by: Stephen Street <stephen@streetfiresound.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
72 lines
2.3 KiB
C
72 lines
2.3 KiB
C
/*
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* Copyright (C) 2005 Stephen Street / StreetFire Sound Labs
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#ifndef PXA2XX_SPI_H_
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#define PXA2XX_SPI_H_
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#define PXA2XX_CS_ASSERT (0x01)
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#define PXA2XX_CS_DEASSERT (0x02)
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#if defined(CONFIG_PXA25x)
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#define CLOCK_SPEED_HZ 3686400
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#define SSP1_SerClkDiv(x) (((CLOCK_SPEED_HZ/2/(x+1))<<8)&0x0000ff00)
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#define SSP2_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00)
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#define SSP3_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00)
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#define SSP_TIMEOUT_SCALE (2712)
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#elif defined(CONFIG_PXA27x)
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#define CLOCK_SPEED_HZ 13000000
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#define SSP1_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00)
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#define SSP2_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00)
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#define SSP3_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00)
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#define SSP_TIMEOUT_SCALE (769)
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#endif
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#define SSP_TIMEOUT(x) ((x*10000)/SSP_TIMEOUT_SCALE)
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#define SSP1_VIRT ((void *)(io_p2v(__PREG(SSCR0_P(1)))))
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#define SSP2_VIRT ((void *)(io_p2v(__PREG(SSCR0_P(2)))))
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#define SSP3_VIRT ((void *)(io_p2v(__PREG(SSCR0_P(3)))))
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enum pxa_ssp_type {
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SSP_UNDEFINED = 0,
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PXA25x_SSP, /* pxa 210, 250, 255, 26x */
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PXA25x_NSSP, /* pxa 255, 26x (including ASSP) */
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PXA27x_SSP,
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};
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/* device.platform_data for SSP controller devices */
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struct pxa2xx_spi_master {
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enum pxa_ssp_type ssp_type;
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u32 clock_enable;
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u16 num_chipselect;
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u8 enable_dma;
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};
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/* spi_board_info.controller_data for SPI slave devices,
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* copied to spi_device.platform_data ... mostly for dma tuning
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*/
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struct pxa2xx_spi_chip {
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u8 tx_threshold;
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u8 rx_threshold;
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u8 dma_burst_size;
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u32 timeout_microsecs;
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u8 enable_loopback;
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void (*cs_control)(u32 command);
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};
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#endif /*PXA2XX_SPI_H_*/
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