mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-22 21:15:44 +07:00
75eb3a67a2
Fix typos 's/wit/with/' in the comments and sort headers alphabetically
in order to avoid duplicate includes in future.
Fixes: bcf7eac3d9 ("regmap: add SCCB support")
Reported-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
129 lines
3.4 KiB
C
129 lines
3.4 KiB
C
// SPDX-License-Identifier: GPL-2.0
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// Register map access API - SCCB support
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#include <linux/i2c.h>
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#include <linux/module.h>
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#include <linux/regmap.h>
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#include "internal.h"
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/**
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* sccb_is_available - Check if the adapter supports SCCB protocol
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* @adap: I2C adapter
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*
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* Return true if the I2C adapter is capable of using SCCB helper functions,
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* false otherwise.
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*/
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static bool sccb_is_available(struct i2c_adapter *adap)
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{
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u32 needed_funcs = I2C_FUNC_SMBUS_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA;
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/*
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* If we ever want support for hardware doing SCCB natively, we will
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* introduce a sccb_xfer() callback to struct i2c_algorithm and check
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* for it here.
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*/
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return (i2c_get_functionality(adap) & needed_funcs) == needed_funcs;
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}
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/**
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* regmap_sccb_read - Read data from SCCB slave device
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* @context: Device that will be interacted with
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* @reg: Register to be read from
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* @val: Pointer to store read value
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*
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* This executes the 2-phase write transmission cycle that is followed by a
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* 2-phase read transmission cycle, returning negative errno else zero on
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* success.
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*/
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static int regmap_sccb_read(void *context, unsigned int reg, unsigned int *val)
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{
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struct device *dev = context;
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struct i2c_client *i2c = to_i2c_client(dev);
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int ret;
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union i2c_smbus_data data;
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i2c_lock_bus(i2c->adapter, I2C_LOCK_SEGMENT);
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ret = __i2c_smbus_xfer(i2c->adapter, i2c->addr, i2c->flags,
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I2C_SMBUS_WRITE, reg, I2C_SMBUS_BYTE, NULL);
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if (ret < 0)
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goto out;
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ret = __i2c_smbus_xfer(i2c->adapter, i2c->addr, i2c->flags,
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I2C_SMBUS_READ, 0, I2C_SMBUS_BYTE, &data);
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if (ret < 0)
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goto out;
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*val = data.byte;
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out:
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i2c_unlock_bus(i2c->adapter, I2C_LOCK_SEGMENT);
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return ret;
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}
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/**
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* regmap_sccb_write - Write data to SCCB slave device
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* @context: Device that will be interacted with
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* @reg: Register to write to
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* @val: Value to be written
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*
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* This executes the SCCB 3-phase write transmission cycle, returning negative
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* errno else zero on success.
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*/
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static int regmap_sccb_write(void *context, unsigned int reg, unsigned int val)
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{
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struct device *dev = context;
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struct i2c_client *i2c = to_i2c_client(dev);
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return i2c_smbus_write_byte_data(i2c, reg, val);
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}
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static struct regmap_bus regmap_sccb_bus = {
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.reg_write = regmap_sccb_write,
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.reg_read = regmap_sccb_read,
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};
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static const struct regmap_bus *regmap_get_sccb_bus(struct i2c_client *i2c,
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const struct regmap_config *config)
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{
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if (config->val_bits == 8 && config->reg_bits == 8 &&
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sccb_is_available(i2c->adapter))
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return ®map_sccb_bus;
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return ERR_PTR(-ENOTSUPP);
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}
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struct regmap *__regmap_init_sccb(struct i2c_client *i2c,
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const struct regmap_config *config,
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struct lock_class_key *lock_key,
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const char *lock_name)
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{
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const struct regmap_bus *bus = regmap_get_sccb_bus(i2c, config);
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if (IS_ERR(bus))
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return ERR_CAST(bus);
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return __regmap_init(&i2c->dev, bus, &i2c->dev, config,
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lock_key, lock_name);
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}
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EXPORT_SYMBOL_GPL(__regmap_init_sccb);
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struct regmap *__devm_regmap_init_sccb(struct i2c_client *i2c,
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const struct regmap_config *config,
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struct lock_class_key *lock_key,
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const char *lock_name)
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{
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const struct regmap_bus *bus = regmap_get_sccb_bus(i2c, config);
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if (IS_ERR(bus))
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return ERR_CAST(bus);
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return __devm_regmap_init(&i2c->dev, bus, &i2c->dev, config,
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lock_key, lock_name);
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}
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EXPORT_SYMBOL_GPL(__devm_regmap_init_sccb);
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MODULE_LICENSE("GPL v2");
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