John Crispin 26cfdbe30d MIPS: lantiq: Initialize the USB core on boot ... There is a DWC2 USB core in these SoCs. To make USB work we need to first reset and power the state machine. These are SoC specific registers and not part of the actual USB core. Signed-off-by: Antti Seppälä <a.seppala@gmail.com> Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11449/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>		2015-11-11 08:38:21 +01:00
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clk.c	MIPS: lantiq: Return correct value for fpi clock on ar9	2015-11-11 08:38:18 +01:00
dcdc.c	mips: lantiq: xway: drop owner assignment from platform_drivers	2014-10-20 16:20:08 +02:00
dma.c	mips: lantiq: xway: drop owner assignment from platform_drivers	2014-10-20 16:20:08 +02:00
gptu.c	mips: lantiq: xway: drop owner assignment from platform_drivers	2014-10-20 16:20:08 +02:00
Makefile	MIPS: lantiq: handle vmmc memory reservation	2014-11-24 07:45:17 +01:00
prom.c	MIPS: Lantiq: Add support for xRX220 SoC	2015-11-11 08:37:31 +01:00
reset.c	MIPS: lantiq: Initialize the USB core on boot	2015-11-11 08:38:21 +01:00
sysctrl.c	MIPS: Lantiq: Fix check for return value of request_mem_region()	2015-11-11 08:37:34 +01:00
vmmc.c	MIPS: lantiq: xway: drop owner assignment from platform_drivers	2015-04-01 17:21:54 +02:00
xrx200_phy_fw.c	Driver core patches for 3.19-rc1	2014-12-14 16:10:09 -08:00