mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-27 12:15:08 +07:00
d77eceb2de
Distinguish between the case where dma information is not provided
within the DT and the case of an error during the dma init.
Exit the probe with error in case of an error during dma init.
Fixes: bb8822cbbc
("i2c: i2c-stm32: Add generic DMA API")
Signed-off-by: Alain Volmat <alain.volmat@st.com>
Reviewed-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
153 lines
3.7 KiB
C
153 lines
3.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* i2c-stm32.c
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*
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* Copyright (C) M'boumba Cedric Madianga 2017
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* Author: M'boumba Cedric Madianga <cedric.madianga@gmail.com>
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*/
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#include "i2c-stm32.h"
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/* Functions for DMA support */
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struct stm32_i2c_dma *stm32_i2c_dma_request(struct device *dev,
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dma_addr_t phy_addr,
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u32 txdr_offset,
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u32 rxdr_offset)
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{
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struct stm32_i2c_dma *dma;
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struct dma_slave_config dma_sconfig;
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int ret;
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dma = devm_kzalloc(dev, sizeof(*dma), GFP_KERNEL);
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if (!dma)
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return ERR_PTR(-ENOMEM);
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/* Request and configure I2C TX dma channel */
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dma->chan_tx = dma_request_chan(dev, "tx");
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if (IS_ERR(dma->chan_tx)) {
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dev_dbg(dev, "can't request DMA tx channel\n");
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ret = PTR_ERR(dma->chan_tx);
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goto fail_al;
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}
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memset(&dma_sconfig, 0, sizeof(dma_sconfig));
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dma_sconfig.dst_addr = phy_addr + txdr_offset;
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dma_sconfig.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
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dma_sconfig.dst_maxburst = 1;
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dma_sconfig.direction = DMA_MEM_TO_DEV;
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ret = dmaengine_slave_config(dma->chan_tx, &dma_sconfig);
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if (ret < 0) {
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dev_err(dev, "can't configure tx channel\n");
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goto fail_tx;
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}
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/* Request and configure I2C RX dma channel */
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dma->chan_rx = dma_request_chan(dev, "rx");
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if (IS_ERR(dma->chan_rx)) {
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dev_err(dev, "can't request DMA rx channel\n");
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ret = PTR_ERR(dma->chan_rx);
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goto fail_tx;
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}
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memset(&dma_sconfig, 0, sizeof(dma_sconfig));
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dma_sconfig.src_addr = phy_addr + rxdr_offset;
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dma_sconfig.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
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dma_sconfig.src_maxburst = 1;
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dma_sconfig.direction = DMA_DEV_TO_MEM;
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ret = dmaengine_slave_config(dma->chan_rx, &dma_sconfig);
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if (ret < 0) {
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dev_err(dev, "can't configure rx channel\n");
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goto fail_rx;
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}
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init_completion(&dma->dma_complete);
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dev_info(dev, "using %s (tx) and %s (rx) for DMA transfers\n",
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dma_chan_name(dma->chan_tx), dma_chan_name(dma->chan_rx));
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return dma;
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fail_rx:
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dma_release_channel(dma->chan_rx);
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fail_tx:
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dma_release_channel(dma->chan_tx);
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fail_al:
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devm_kfree(dev, dma);
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dev_info(dev, "can't use DMA\n");
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return ERR_PTR(ret);
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}
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void stm32_i2c_dma_free(struct stm32_i2c_dma *dma)
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{
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dma->dma_buf = 0;
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dma->dma_len = 0;
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dma_release_channel(dma->chan_tx);
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dma->chan_tx = NULL;
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dma_release_channel(dma->chan_rx);
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dma->chan_rx = NULL;
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dma->chan_using = NULL;
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}
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int stm32_i2c_prep_dma_xfer(struct device *dev, struct stm32_i2c_dma *dma,
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bool rd_wr, u32 len, u8 *buf,
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dma_async_tx_callback callback,
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void *dma_async_param)
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{
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struct dma_async_tx_descriptor *txdesc;
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struct device *chan_dev;
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int ret;
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if (rd_wr) {
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dma->chan_using = dma->chan_rx;
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dma->dma_transfer_dir = DMA_DEV_TO_MEM;
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dma->dma_data_dir = DMA_FROM_DEVICE;
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} else {
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dma->chan_using = dma->chan_tx;
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dma->dma_transfer_dir = DMA_MEM_TO_DEV;
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dma->dma_data_dir = DMA_TO_DEVICE;
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}
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dma->dma_len = len;
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chan_dev = dma->chan_using->device->dev;
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dma->dma_buf = dma_map_single(chan_dev, buf, dma->dma_len,
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dma->dma_data_dir);
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if (dma_mapping_error(chan_dev, dma->dma_buf)) {
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dev_err(dev, "DMA mapping failed\n");
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return -EINVAL;
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}
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txdesc = dmaengine_prep_slave_single(dma->chan_using, dma->dma_buf,
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dma->dma_len,
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dma->dma_transfer_dir,
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DMA_PREP_INTERRUPT);
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if (!txdesc) {
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dev_err(dev, "Not able to get desc for DMA xfer\n");
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ret = -EINVAL;
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goto err;
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}
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reinit_completion(&dma->dma_complete);
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txdesc->callback = callback;
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txdesc->callback_param = dma_async_param;
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ret = dma_submit_error(dmaengine_submit(txdesc));
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if (ret < 0) {
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dev_err(dev, "DMA submit failed\n");
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goto err;
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}
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dma_async_issue_pending(dma->chan_using);
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return 0;
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err:
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dma_unmap_single(chan_dev, dma->dma_buf, dma->dma_len,
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dma->dma_data_dir);
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return ret;
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}
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