Ley Foon Tan 4a89c3088f nios2: fix cache coherency issue when debug with gdb ... Remove the end address checking for flushda function. We need to flush each address line for flushda instruction, from start to end address. This is because flushda instruction only flush the cache if tag and line fields are matched. Change to use ldwio instruction (bypass cache) to load the instruction that causing trap. Our interest is the actual instruction that executed by the processor, this should be uncached. Note, EA address might be an userspace cached address. Signed-off-by: Ley Foon Tan <lftan@altera.com>		2015-04-10 11:10:08 +08:00
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cacheflush.c	nios2: fix cache coherency issue when debug with gdb	2015-04-10 11:10:08 +08:00
dma-mapping.c	nios2: DMA mapping API	2014-12-08 12:55:56 +08:00
extable.c	nios2: MMU Fault handling	2014-12-08 12:55:52 +08:00
fault.c	nios2: mm: do not invoke OOM killer on kernel fault OOM	2015-03-16 15:35:25 +08:00
init.c	nios2: Memory management	2014-12-08 12:55:51 +08:00
ioremap.c	nios2: I/O Mapping	2014-12-08 12:55:52 +08:00
Makefile	nios2: Build infrastructure	2014-12-08 12:56:06 +08:00
mmu_context.c	nios2: Process management	2014-12-08 12:55:53 +08:00
pgtable.c	nios2: Page table management	2014-12-08 12:55:53 +08:00
tlb.c	nios2: TLB handling	2014-12-08 12:55:54 +08:00
uaccess.c	nios2: Memory management	2014-12-08 12:55:51 +08:00