mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-30 11:16:48 +07:00
25d21ad6e7
This adds the TLB miss handler assembly, the low level TLB flush routines along with the necessary hook for dealing with our virtual page tables or indirect TLB entries that need to be flushes when PTE pages are freed. There is currently no support for hugetlbfs Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
90 lines
2.2 KiB
C
90 lines
2.2 KiB
C
#ifndef _ASM_POWERPC_MMU_HASH32_H_
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#define _ASM_POWERPC_MMU_HASH32_H_
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/*
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* 32-bit hash table MMU support
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*/
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/*
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* BATs
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*/
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/* Block size masks */
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#define BL_128K 0x000
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#define BL_256K 0x001
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#define BL_512K 0x003
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#define BL_1M 0x007
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#define BL_2M 0x00F
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#define BL_4M 0x01F
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#define BL_8M 0x03F
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#define BL_16M 0x07F
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#define BL_32M 0x0FF
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#define BL_64M 0x1FF
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#define BL_128M 0x3FF
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#define BL_256M 0x7FF
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/* BAT Access Protection */
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#define BPP_XX 0x00 /* No access */
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#define BPP_RX 0x01 /* Read only */
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#define BPP_RW 0x02 /* Read/write */
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#ifndef __ASSEMBLY__
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/* Contort a phys_addr_t into the right format/bits for a BAT */
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#ifdef CONFIG_PHYS_64BIT
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#define BAT_PHYS_ADDR(x) ((u32)((x & 0x00000000fffe0000ULL) | \
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((x & 0x0000000e00000000ULL) >> 24) | \
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((x & 0x0000000100000000ULL) >> 30)))
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#else
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#define BAT_PHYS_ADDR(x) (x)
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#endif
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struct ppc_bat {
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u32 batu;
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u32 batl;
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};
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#endif /* !__ASSEMBLY__ */
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/*
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* Hash table
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*/
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/* Values for PP (assumes Ks=0, Kp=1) */
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#define PP_RWXX 0 /* Supervisor read/write, User none */
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#define PP_RWRX 1 /* Supervisor read/write, User read */
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#define PP_RWRW 2 /* Supervisor read/write, User read/write */
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#define PP_RXRX 3 /* Supervisor read, User read */
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#ifndef __ASSEMBLY__
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/* Hardware Page Table Entry */
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struct hash_pte {
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unsigned long v:1; /* Entry is valid */
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unsigned long vsid:24; /* Virtual segment identifier */
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unsigned long h:1; /* Hash algorithm indicator */
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unsigned long api:6; /* Abbreviated page index */
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unsigned long rpn:20; /* Real (physical) page number */
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unsigned long :3; /* Unused */
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unsigned long r:1; /* Referenced */
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unsigned long c:1; /* Changed */
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unsigned long w:1; /* Write-thru cache mode */
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unsigned long i:1; /* Cache inhibited */
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unsigned long m:1; /* Memory coherence */
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unsigned long g:1; /* Guarded */
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unsigned long :1; /* Unused */
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unsigned long pp:2; /* Page protection */
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};
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typedef struct {
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unsigned long id;
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unsigned long vdso_base;
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} mm_context_t;
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#endif /* !__ASSEMBLY__ */
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/* We happily ignore the smaller BATs on 601, we don't actually use
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* those definitions on hash32 at the moment anyway
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*/
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#define mmu_virtual_psize MMU_PAGE_4K
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#define mmu_linear_psize MMU_PAGE_256M
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#endif /* _ASM_POWERPC_MMU_HASH32_H_ */
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