mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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7c2ce6e60f
This patch adds support for adaptive interrupt coalescing. For small pkts with low pkt rate, we can decrease the coalescing interrupt dynamically which decreases the latency. This however increases the cpu utilization. Based on testing with different coal intr and pkt rate we came up with a table(mod_table) with rx_rate and coalescing interrupt value where we get low latency without significant increase in cpu. mod_table table stores the coalescing timer percentage value for different throughputs. Function enic_calc_int_moderation() calculates the desired coalescing intr timer value. This function is called in driver rx napi_poll. The actual value is set by enic_set_int_moderation() which is called when napi_poll is complete. i.e when we unmask the rx intr. Adaptive coal intr is support only when driver is using msix intr. Because intr is not shared. Struct mod_range is used to store only the default adaptive coalescing intr value. Adaptive coal intr calue is calculated by timer = range_start + ((rx_coal->range_end - range_start) * mod_table[index].range_percent / 100); rx_coal->range_end is the rx-usecs-high value set using ethtool. range_start is rx-usecs-low, set using ethtool, if rx_small_pkt_bytes_cnt is greater than 2 * rx_large_pkt_bytes_cnt. i.e small pkts are dominant. Else its rx-usecs-low + 3. Cc: Christian Benvenuti <benve@cisco.com> Cc: Neel Patel <neepatel@cisco.com> Signed-off-by: Sujith Sankar <ssujith@cisco.com> Signed-off-by: Govindarajulu Varadarajan <_govind@gmx.com> Signed-off-by: David S. Miller <davem@davemloft.net>
124 lines
3.4 KiB
C
124 lines
3.4 KiB
C
/*
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* Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
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* Copyright 2007 Nuova Systems, Inc. All rights reserved.
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*
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* This program is free software; you may redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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*/
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#ifndef _VNIC_CQ_H_
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#define _VNIC_CQ_H_
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#include "cq_desc.h"
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#include "vnic_dev.h"
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/* Completion queue control */
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struct vnic_cq_ctrl {
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u64 ring_base; /* 0x00 */
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u32 ring_size; /* 0x08 */
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u32 pad0;
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u32 flow_control_enable; /* 0x10 */
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u32 pad1;
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u32 color_enable; /* 0x18 */
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u32 pad2;
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u32 cq_head; /* 0x20 */
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u32 pad3;
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u32 cq_tail; /* 0x28 */
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u32 pad4;
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u32 cq_tail_color; /* 0x30 */
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u32 pad5;
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u32 interrupt_enable; /* 0x38 */
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u32 pad6;
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u32 cq_entry_enable; /* 0x40 */
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u32 pad7;
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u32 cq_message_enable; /* 0x48 */
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u32 pad8;
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u32 interrupt_offset; /* 0x50 */
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u32 pad9;
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u64 cq_message_addr; /* 0x58 */
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u32 pad10;
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};
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struct vnic_rx_bytes_counter {
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unsigned int small_pkt_bytes_cnt;
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unsigned int large_pkt_bytes_cnt;
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};
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struct vnic_cq {
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unsigned int index;
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struct vnic_dev *vdev;
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struct vnic_cq_ctrl __iomem *ctrl; /* memory-mapped */
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struct vnic_dev_ring ring;
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unsigned int to_clean;
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unsigned int last_color;
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unsigned int interrupt_offset;
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struct vnic_rx_bytes_counter pkt_size_counter;
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unsigned int cur_rx_coal_timeval;
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unsigned int tobe_rx_coal_timeval;
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ktime_t prev_ts;
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};
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static inline unsigned int vnic_cq_service(struct vnic_cq *cq,
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unsigned int work_to_do,
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int (*q_service)(struct vnic_dev *vdev, struct cq_desc *cq_desc,
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u8 type, u16 q_number, u16 completed_index, void *opaque),
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void *opaque)
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{
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struct cq_desc *cq_desc;
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unsigned int work_done = 0;
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u16 q_number, completed_index;
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u8 type, color;
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cq_desc = (struct cq_desc *)((u8 *)cq->ring.descs +
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cq->ring.desc_size * cq->to_clean);
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cq_desc_dec(cq_desc, &type, &color,
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&q_number, &completed_index);
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while (color != cq->last_color) {
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if ((*q_service)(cq->vdev, cq_desc, type,
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q_number, completed_index, opaque))
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break;
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cq->to_clean++;
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if (cq->to_clean == cq->ring.desc_count) {
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cq->to_clean = 0;
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cq->last_color = cq->last_color ? 0 : 1;
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}
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cq_desc = (struct cq_desc *)((u8 *)cq->ring.descs +
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cq->ring.desc_size * cq->to_clean);
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cq_desc_dec(cq_desc, &type, &color,
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&q_number, &completed_index);
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work_done++;
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if (work_done >= work_to_do)
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break;
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}
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return work_done;
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}
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void vnic_cq_free(struct vnic_cq *cq);
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int vnic_cq_alloc(struct vnic_dev *vdev, struct vnic_cq *cq, unsigned int index,
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unsigned int desc_count, unsigned int desc_size);
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void vnic_cq_init(struct vnic_cq *cq, unsigned int flow_control_enable,
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unsigned int color_enable, unsigned int cq_head, unsigned int cq_tail,
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unsigned int cq_tail_color, unsigned int interrupt_enable,
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unsigned int cq_entry_enable, unsigned int message_enable,
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unsigned int interrupt_offset, u64 message_addr);
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void vnic_cq_clean(struct vnic_cq *cq);
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#endif /* _VNIC_CQ_H_ */
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