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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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0624517d80
forbid asm/bitops.h direct inclusion Because of compile errors that may occur after bit changes if asm/bitops.h is included directly without e.g. linux/kernel.h which includes linux/bitops.h, forbid direct inclusion of asm/bitops.h. Thanks to Adrian Bunk. Signed-off-by: Jiri Slaby <jirislaby@gmail.com> Cc: Adrian Bunk <bunk@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
213 lines
6.0 KiB
C
213 lines
6.0 KiB
C
#ifndef _H8300_BITOPS_H
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#define _H8300_BITOPS_H
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/*
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* Copyright 1992, Linus Torvalds.
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* Copyright 2002, Yoshinori Sato
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*/
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#include <linux/compiler.h>
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#include <asm/system.h>
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#ifdef __KERNEL__
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#ifndef _LINUX_BITOPS_H
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#error only <linux/bitops.h> can be included directly
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#endif
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/*
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* Function prototypes to keep gcc -Wall happy
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*/
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/*
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* ffz = Find First Zero in word. Undefined if no zero exists,
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* so code should check against ~0UL first..
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*/
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static __inline__ unsigned long ffz(unsigned long word)
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{
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unsigned long result;
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result = -1;
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__asm__("1:\n\t"
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"shlr.l %2\n\t"
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"adds #1,%0\n\t"
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"bcs 1b"
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: "=r" (result)
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: "0" (result),"r" (word));
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return result;
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}
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#define H8300_GEN_BITOP_CONST(OP,BIT) \
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case BIT: \
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__asm__(OP " #" #BIT ",@%0"::"r"(b_addr):"memory"); \
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break;
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#define H8300_GEN_BITOP(FNAME,OP) \
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static __inline__ void FNAME(int nr, volatile unsigned long* addr) \
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{ \
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volatile unsigned char *b_addr; \
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b_addr = (volatile unsigned char *)addr + ((nr >> 3) ^ 3); \
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if (__builtin_constant_p(nr)) { \
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switch(nr & 7) { \
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H8300_GEN_BITOP_CONST(OP,0) \
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H8300_GEN_BITOP_CONST(OP,1) \
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H8300_GEN_BITOP_CONST(OP,2) \
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H8300_GEN_BITOP_CONST(OP,3) \
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H8300_GEN_BITOP_CONST(OP,4) \
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H8300_GEN_BITOP_CONST(OP,5) \
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H8300_GEN_BITOP_CONST(OP,6) \
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H8300_GEN_BITOP_CONST(OP,7) \
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} \
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} else { \
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__asm__(OP " %w0,@%1"::"r"(nr),"r"(b_addr):"memory"); \
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} \
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}
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/*
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* clear_bit() doesn't provide any barrier for the compiler.
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*/
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#define smp_mb__before_clear_bit() barrier()
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#define smp_mb__after_clear_bit() barrier()
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H8300_GEN_BITOP(set_bit ,"bset")
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H8300_GEN_BITOP(clear_bit ,"bclr")
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H8300_GEN_BITOP(change_bit,"bnot")
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#define __set_bit(nr,addr) set_bit((nr),(addr))
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#define __clear_bit(nr,addr) clear_bit((nr),(addr))
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#define __change_bit(nr,addr) change_bit((nr),(addr))
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#undef H8300_GEN_BITOP
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#undef H8300_GEN_BITOP_CONST
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static __inline__ int test_bit(int nr, const unsigned long* addr)
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{
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return (*((volatile unsigned char *)addr +
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((nr >> 3) ^ 3)) & (1UL << (nr & 7))) != 0;
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}
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#define __test_bit(nr, addr) test_bit(nr, addr)
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#define H8300_GEN_TEST_BITOP_CONST_INT(OP,BIT) \
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case BIT: \
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__asm__("stc ccr,%w1\n\t" \
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"orc #0x80,ccr\n\t" \
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"bld #" #BIT ",@%4\n\t" \
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OP " #" #BIT ",@%4\n\t" \
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"rotxl.l %0\n\t" \
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"ldc %w1,ccr" \
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: "=r"(retval),"=&r"(ccrsave),"=m"(*b_addr) \
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: "0" (retval),"r" (b_addr) \
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: "memory"); \
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break;
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#define H8300_GEN_TEST_BITOP_CONST(OP,BIT) \
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case BIT: \
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__asm__("bld #" #BIT ",@%3\n\t" \
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OP " #" #BIT ",@%3\n\t" \
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"rotxl.l %0\n\t" \
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: "=r"(retval),"=m"(*b_addr) \
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: "0" (retval),"r" (b_addr) \
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: "memory"); \
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break;
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#define H8300_GEN_TEST_BITOP(FNNAME,OP) \
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static __inline__ int FNNAME(int nr, volatile void * addr) \
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{ \
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int retval = 0; \
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char ccrsave; \
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volatile unsigned char *b_addr; \
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b_addr = (volatile unsigned char *)addr + ((nr >> 3) ^ 3); \
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if (__builtin_constant_p(nr)) { \
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switch(nr & 7) { \
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H8300_GEN_TEST_BITOP_CONST_INT(OP,0) \
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H8300_GEN_TEST_BITOP_CONST_INT(OP,1) \
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H8300_GEN_TEST_BITOP_CONST_INT(OP,2) \
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H8300_GEN_TEST_BITOP_CONST_INT(OP,3) \
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H8300_GEN_TEST_BITOP_CONST_INT(OP,4) \
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H8300_GEN_TEST_BITOP_CONST_INT(OP,5) \
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H8300_GEN_TEST_BITOP_CONST_INT(OP,6) \
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H8300_GEN_TEST_BITOP_CONST_INT(OP,7) \
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} \
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} else { \
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__asm__("stc ccr,%w1\n\t" \
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"orc #0x80,ccr\n\t" \
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"btst %w5,@%4\n\t" \
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OP " %w5,@%4\n\t" \
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"beq 1f\n\t" \
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"inc.l #1,%0\n" \
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"1:\n\t" \
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"ldc %w1,ccr" \
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: "=r"(retval),"=&r"(ccrsave),"=m"(*b_addr) \
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: "0" (retval),"r" (b_addr),"r"(nr) \
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: "memory"); \
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} \
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return retval; \
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} \
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\
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static __inline__ int __ ## FNNAME(int nr, volatile void * addr) \
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{ \
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int retval = 0; \
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volatile unsigned char *b_addr; \
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b_addr = (volatile unsigned char *)addr + ((nr >> 3) ^ 3); \
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if (__builtin_constant_p(nr)) { \
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switch(nr & 7) { \
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H8300_GEN_TEST_BITOP_CONST(OP,0) \
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H8300_GEN_TEST_BITOP_CONST(OP,1) \
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H8300_GEN_TEST_BITOP_CONST(OP,2) \
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H8300_GEN_TEST_BITOP_CONST(OP,3) \
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H8300_GEN_TEST_BITOP_CONST(OP,4) \
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H8300_GEN_TEST_BITOP_CONST(OP,5) \
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H8300_GEN_TEST_BITOP_CONST(OP,6) \
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H8300_GEN_TEST_BITOP_CONST(OP,7) \
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} \
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} else { \
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__asm__("btst %w4,@%3\n\t" \
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OP " %w4,@%3\n\t" \
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"beq 1f\n\t" \
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"inc.l #1,%0\n" \
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"1:" \
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: "=r"(retval),"=m"(*b_addr) \
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: "0" (retval),"r" (b_addr),"r"(nr) \
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: "memory"); \
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} \
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return retval; \
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}
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H8300_GEN_TEST_BITOP(test_and_set_bit, "bset")
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H8300_GEN_TEST_BITOP(test_and_clear_bit, "bclr")
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H8300_GEN_TEST_BITOP(test_and_change_bit,"bnot")
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#undef H8300_GEN_TEST_BITOP_CONST
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#undef H8300_GEN_TEST_BITOP_CONST_INT
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#undef H8300_GEN_TEST_BITOP
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#include <asm-generic/bitops/ffs.h>
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static __inline__ unsigned long __ffs(unsigned long word)
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{
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unsigned long result;
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result = -1;
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__asm__("1:\n\t"
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"shlr.l %2\n\t"
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"adds #1,%0\n\t"
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"bcc 1b"
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: "=r" (result)
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: "0"(result),"r"(word));
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return result;
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}
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#include <asm-generic/bitops/find.h>
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#include <asm-generic/bitops/sched.h>
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#include <asm-generic/bitops/hweight.h>
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#include <asm-generic/bitops/lock.h>
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#include <asm-generic/bitops/ext2-non-atomic.h>
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#include <asm-generic/bitops/ext2-atomic.h>
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#include <asm-generic/bitops/minix.h>
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#endif /* __KERNEL__ */
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#include <asm-generic/bitops/fls.h>
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#include <asm-generic/bitops/fls64.h>
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#endif /* _H8300_BITOPS_H */
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