mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-24 10:37:45 +07:00
7447d56217
Pull perf updates from Ingo Molnar:
"Most of the changes are for tooling, the main changes in this cycle were:
- Improve Intel-PT hardware tracing support, both on the kernel and
on the tooling side: PTWRITE instruction support, power events for
C-state tracing, etc. (Adrian Hunter)
- Add support to measure SMI cost to the x86 architecture, with
tooling support in 'perf stat' (Kan Liang)
- Support function filtering in 'perf ftrace', plus related
improvements (Namhyung Kim)
- Allow adding and removing fields to the default 'perf script'
columns, using + or - as field prefixes to do so (Andi Kleen)
- Allow resolving the DSO name with 'perf script -F brstack{sym,off},dso'
(Mark Santaniello)
- Add perf tooling unwind support for PowerPC (Paolo Bonzini)
- ... and various other improvements as well"
* 'perf-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (84 commits)
perf auxtrace: Add CPU filter support
perf intel-pt: Do not use TSC packets for calculating CPU cycles to TSC
perf intel-pt: Update documentation to include new ptwrite and power events
perf intel-pt: Add example script for power events and PTWRITE
perf intel-pt: Synthesize new power and "ptwrite" events
perf intel-pt: Move code in intel_pt_synth_events() to simplify attr setting
perf intel-pt: Factor out intel_pt_set_event_name()
perf intel-pt: Tidy messages into called function intel_pt_synth_event()
perf intel-pt: Tidy Intel PT evsel lookup into separate function
perf intel-pt: Join needlessly wrapped lines
perf intel-pt: Remove unused instructions_sample_period
perf intel-pt: Factor out common code synthesizing event samples
perf script: Add synthesized Intel PT power and ptwrite events
perf/x86/intel: Constify the 'lbr_desc[]' array and make a function static
perf script: Add 'synth' field for synthesized event payloads
perf auxtrace: Add itrace option to output power events
perf auxtrace: Add itrace option to output ptwrite events
tools include: Add byte-swapping macros to kernel.h
perf script: Add 'synth' event type for synthesized events
x86/insn: perf tools: Add new ptwrite instruction
...
168 lines
4.6 KiB
C
168 lines
4.6 KiB
C
#ifndef _TOOLS_LINUX_COMPILER_H_
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#define _TOOLS_LINUX_COMPILER_H_
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#ifdef __GNUC__
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#include <linux/compiler-gcc.h>
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#endif
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#ifndef __compiletime_error
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# define __compiletime_error(message)
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#endif
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/* Optimization barrier */
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/* The "volatile" is due to gcc bugs */
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#define barrier() __asm__ __volatile__("": : :"memory")
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#ifndef __always_inline
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# define __always_inline inline __attribute__((always_inline))
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#endif
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#ifndef noinline
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#define noinline
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#endif
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/* Are two types/vars the same type (ignoring qualifiers)? */
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#ifndef __same_type
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# define __same_type(a, b) __builtin_types_compatible_p(typeof(a), typeof(b))
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#endif
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#ifdef __ANDROID__
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/*
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* FIXME: Big hammer to get rid of tons of:
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* "warning: always_inline function might not be inlinable"
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*
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* At least on android-ndk-r12/platforms/android-24/arch-arm
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*/
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#undef __always_inline
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#define __always_inline inline
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#endif
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#define __user
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#define __rcu
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#define __read_mostly
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#ifndef __attribute_const__
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# define __attribute_const__
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#endif
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#ifndef __maybe_unused
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# define __maybe_unused __attribute__((unused))
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#endif
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#ifndef __used
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# define __used __attribute__((__unused__))
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#endif
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#ifndef __packed
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# define __packed __attribute__((__packed__))
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#endif
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#ifndef __force
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# define __force
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#endif
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#ifndef __weak
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# define __weak __attribute__((weak))
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#endif
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#ifndef likely
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# define likely(x) __builtin_expect(!!(x), 1)
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#endif
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#ifndef unlikely
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# define unlikely(x) __builtin_expect(!!(x), 0)
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#endif
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#ifndef __init
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# define __init
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#endif
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#ifndef noinline
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# define noinline
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#endif
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#define uninitialized_var(x) x = *(&(x))
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#define ACCESS_ONCE(x) (*(volatile typeof(x) *)&(x))
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#include <linux/types.h>
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/*
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* Following functions are taken from kernel sources and
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* break aliasing rules in their original form.
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*
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* While kernel is compiled with -fno-strict-aliasing,
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* perf uses -Wstrict-aliasing=3 which makes build fail
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* under gcc 4.4.
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*
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* Using extra __may_alias__ type to allow aliasing
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* in this case.
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*/
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typedef __u8 __attribute__((__may_alias__)) __u8_alias_t;
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typedef __u16 __attribute__((__may_alias__)) __u16_alias_t;
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typedef __u32 __attribute__((__may_alias__)) __u32_alias_t;
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typedef __u64 __attribute__((__may_alias__)) __u64_alias_t;
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static __always_inline void __read_once_size(const volatile void *p, void *res, int size)
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{
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switch (size) {
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case 1: *(__u8_alias_t *) res = *(volatile __u8_alias_t *) p; break;
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case 2: *(__u16_alias_t *) res = *(volatile __u16_alias_t *) p; break;
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case 4: *(__u32_alias_t *) res = *(volatile __u32_alias_t *) p; break;
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case 8: *(__u64_alias_t *) res = *(volatile __u64_alias_t *) p; break;
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default:
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barrier();
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__builtin_memcpy((void *)res, (const void *)p, size);
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barrier();
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}
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}
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static __always_inline void __write_once_size(volatile void *p, void *res, int size)
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{
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switch (size) {
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case 1: *(volatile __u8_alias_t *) p = *(__u8_alias_t *) res; break;
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case 2: *(volatile __u16_alias_t *) p = *(__u16_alias_t *) res; break;
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case 4: *(volatile __u32_alias_t *) p = *(__u32_alias_t *) res; break;
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case 8: *(volatile __u64_alias_t *) p = *(__u64_alias_t *) res; break;
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default:
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barrier();
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__builtin_memcpy((void *)p, (const void *)res, size);
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barrier();
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}
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}
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/*
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* Prevent the compiler from merging or refetching reads or writes. The
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* compiler is also forbidden from reordering successive instances of
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* READ_ONCE, WRITE_ONCE and ACCESS_ONCE (see below), but only when the
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* compiler is aware of some particular ordering. One way to make the
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* compiler aware of ordering is to put the two invocations of READ_ONCE,
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* WRITE_ONCE or ACCESS_ONCE() in different C statements.
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*
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* In contrast to ACCESS_ONCE these two macros will also work on aggregate
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* data types like structs or unions. If the size of the accessed data
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* type exceeds the word size of the machine (e.g., 32 bits or 64 bits)
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* READ_ONCE() and WRITE_ONCE() will fall back to memcpy and print a
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* compile-time warning.
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*
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* Their two major use cases are: (1) Mediating communication between
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* process-level code and irq/NMI handlers, all running on the same CPU,
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* and (2) Ensuring that the compiler does not fold, spindle, or otherwise
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* mutilate accesses that either do not require ordering or that interact
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* with an explicit memory barrier or atomic instruction that provides the
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* required ordering.
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*/
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#define READ_ONCE(x) \
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({ union { typeof(x) __val; char __c[1]; } __u; __read_once_size(&(x), __u.__c, sizeof(x)); __u.__val; })
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#define WRITE_ONCE(x, val) \
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({ union { typeof(x) __val; char __c[1]; } __u = { .__val = (val) }; __write_once_size(&(x), __u.__c, sizeof(x)); __u.__val; })
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#ifndef __fallthrough
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# define __fallthrough
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#endif
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#endif /* _TOOLS_LINUX_COMPILER_H */
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