Joshua Aberback 254eb07cb0 drm/amd/display: Optimize bandwidth validation by adding early return ... We can split validation into three parts: getting voltage level, getting watermarks, and rq/dlg calculations. The voltage level is enough to answer the question "do we support this state", and the rest of it is to determine what hardware programming is needed to support the state. Most of the calls to validate_bandwidth only care about the first part, so we added an early return in that case Signed-off-by: Joshua Aberback <joshua.aberback@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2019-06-22 09:34:09 -05:00
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dcn20_dccg.c	drm/amd/display: Add DCN2 clk mgr	2019-06-21 18:59:34 -05:00
dcn20_dccg.h	drm/amd/display: Add DCN2 clk mgr	2019-06-21 18:59:34 -05:00
dcn20_dpp_cm.c	drm/amd/display: Add DCN2 DPP	2019-06-21 18:59:34 -05:00
dcn20_dpp.c	drm/amd/display: Add DCN2 DPP	2019-06-21 18:59:34 -05:00
dcn20_dpp.h	drm/amd/display: Add DCN2 DPP	2019-06-21 18:59:34 -05:00
dcn20_dsc.c	drm/amd/display: fix dsc validation	2019-06-22 09:34:08 -05:00
dcn20_dsc.h	drm/amd/display: fix dsc validation	2019-06-22 09:34:08 -05:00
dcn20_dwb_scl.c	drm/amd/display: Add DCN2 DWB	2019-06-21 18:59:35 -05:00
dcn20_dwb.c	drm/amd/display: Add DCN2 DWB	2019-06-21 18:59:35 -05:00
dcn20_dwb.h	drm/amd/display: Add DCN2 DWB	2019-06-21 18:59:35 -05:00
dcn20_hubbub.c	drm/amd/display: fixed DCC corruption	2019-06-22 09:34:08 -05:00
dcn20_hubbub.h	drm/amd/display: Add DCN2 HUBP and HUBBUB	2019-06-21 18:59:34 -05:00
dcn20_hubp.c	drm/amd/display: DCN2 reg refactors	2019-06-22 09:34:09 -05:00
dcn20_hubp.h	drm/amd/display: DCN2 reg refactors	2019-06-22 09:34:09 -05:00
dcn20_hwseq.c	drm/amd/display: Optimize bandwidth validation by adding early return	2019-06-22 09:34:09 -05:00
dcn20_hwseq.h	drm/amd/display: Remove dependency on pipe->plane for immedaite flip status	2019-06-22 09:34:09 -05:00
dcn20_link_encoder.c	drm/amd/display: Add DSC support for Navi (v2)	2019-06-22 09:34:07 -05:00
dcn20_link_encoder.h	drm/amd/display: Add DSC support for Navi (v2)	2019-06-22 09:34:07 -05:00
dcn20_mmhubbub.c	drm/amd/display: Add DCN2 MMHUBBUB	2019-06-21 18:59:34 -05:00
dcn20_mmhubbub.h	drm/amd/display: Add DCN2 MMHUBBUB	2019-06-21 18:59:34 -05:00
dcn20_mpc.c	drm/amd/display: Add DCN2 MPC	2019-06-21 18:59:34 -05:00
dcn20_mpc.h	drm/amd/display: Add DCN2 MPC	2019-06-21 18:59:34 -05:00
dcn20_opp.c	drm/amd/display: Add DCN2 OPP	2019-06-21 18:59:34 -05:00
dcn20_opp.h	drm/amd/display: Add DCN2 OPP	2019-06-21 18:59:34 -05:00
dcn20_optc.c	drm/amd/display: isolate global double buffer lock programming	2019-06-22 09:34:09 -05:00
dcn20_optc.h	drm/amd/display: isolate global double buffer lock programming	2019-06-22 09:34:09 -05:00
dcn20_resource.c	drm/amd/display: Optimize bandwidth validation by adding early return	2019-06-22 09:34:09 -05:00
dcn20_resource.h	drm/amd/display: fix dsc validation	2019-06-22 09:34:08 -05:00
dcn20_stream_encoder.c	drm/amd/display: navi10 bring up skip dsc encoder config	2019-06-22 09:34:08 -05:00
dcn20_stream_encoder.h	drm/amd/display: Refactor DIO stream encoder	2019-06-22 09:34:08 -05:00
dcn20_vmid.c	drm/amd/display: Add DCN2 VMID	2019-06-21 18:59:35 -05:00
dcn20_vmid.h	drm/amd/display: Add DCN2 VMID	2019-06-21 18:59:35 -05:00
Makefile	drm/amd/display: Add DSC support for Navi (v2)	2019-06-22 09:34:07 -05:00