mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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c458c4ada0
Shuffle some instructions around in the __hround macro to shave off 0.1 cycles per byte on Cortex-A57. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
111 lines
2.5 KiB
ArmAsm
111 lines
2.5 KiB
ArmAsm
/*
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* Scalar AES core transform
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*
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* Copyright (C) 2017 Linaro Ltd <ard.biesheuvel@linaro.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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.text
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rk .req x0
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out .req x1
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in .req x2
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rounds .req x3
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tt .req x4
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lt .req x2
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.macro __pair, enc, reg0, reg1, in0, in1e, in1d, shift
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ubfx \reg0, \in0, #\shift, #8
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.if \enc
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ubfx \reg1, \in1e, #\shift, #8
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.else
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ubfx \reg1, \in1d, #\shift, #8
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.endif
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ldr \reg0, [tt, \reg0, uxtw #2]
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ldr \reg1, [tt, \reg1, uxtw #2]
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.endm
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.macro __hround, out0, out1, in0, in1, in2, in3, t0, t1, enc
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ldp \out0, \out1, [rk], #8
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__pair \enc, w13, w14, \in0, \in1, \in3, 0
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__pair \enc, w15, w16, \in1, \in2, \in0, 8
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__pair \enc, w17, w18, \in2, \in3, \in1, 16
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__pair \enc, \t0, \t1, \in3, \in0, \in2, 24
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eor \out0, \out0, w13
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eor \out1, \out1, w14
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eor \out0, \out0, w15, ror #24
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eor \out1, \out1, w16, ror #24
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eor \out0, \out0, w17, ror #16
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eor \out1, \out1, w18, ror #16
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eor \out0, \out0, \t0, ror #8
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eor \out1, \out1, \t1, ror #8
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.endm
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.macro fround, out0, out1, out2, out3, in0, in1, in2, in3
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__hround \out0, \out1, \in0, \in1, \in2, \in3, \out2, \out3, 1
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__hround \out2, \out3, \in2, \in3, \in0, \in1, \in1, \in2, 1
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.endm
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.macro iround, out0, out1, out2, out3, in0, in1, in2, in3
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__hround \out0, \out1, \in0, \in3, \in2, \in1, \out2, \out3, 0
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__hround \out2, \out3, \in2, \in1, \in0, \in3, \in1, \in0, 0
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.endm
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.macro do_crypt, round, ttab, ltab
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ldp w5, w6, [in]
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ldp w7, w8, [in, #8]
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ldp w9, w10, [rk], #16
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ldp w11, w12, [rk, #-8]
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CPU_BE( rev w5, w5 )
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CPU_BE( rev w6, w6 )
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CPU_BE( rev w7, w7 )
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CPU_BE( rev w8, w8 )
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eor w5, w5, w9
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eor w6, w6, w10
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eor w7, w7, w11
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eor w8, w8, w12
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adr_l tt, \ttab
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adr_l lt, \ltab
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tbnz rounds, #1, 1f
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0: \round w9, w10, w11, w12, w5, w6, w7, w8
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\round w5, w6, w7, w8, w9, w10, w11, w12
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1: subs rounds, rounds, #4
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\round w9, w10, w11, w12, w5, w6, w7, w8
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csel tt, tt, lt, hi
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\round w5, w6, w7, w8, w9, w10, w11, w12
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b.hi 0b
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CPU_BE( rev w5, w5 )
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CPU_BE( rev w6, w6 )
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CPU_BE( rev w7, w7 )
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CPU_BE( rev w8, w8 )
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stp w5, w6, [out]
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stp w7, w8, [out, #8]
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ret
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.endm
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.align 5
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ENTRY(__aes_arm64_encrypt)
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do_crypt fround, crypto_ft_tab, crypto_fl_tab
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ENDPROC(__aes_arm64_encrypt)
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.align 5
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ENTRY(__aes_arm64_decrypt)
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do_crypt iround, crypto_it_tab, crypto_il_tab
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ENDPROC(__aes_arm64_decrypt)
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