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1e02ce4ccc
Context switches and TLB flushes can change individual bits of CR4. CR4 reads take several cycles, so store a shadow copy of CR4 in a per-cpu variable. To avoid wasting a cache line, I added the CR4 shadow to cpu_tlbstate, which is already touched in switch_mm. The heaviest users of the cr4 shadow will be switch_mm and __switch_to_xtra, and __switch_to_xtra is called shortly after switch_mm during context switch, so the cacheline is likely to be hot. Signed-off-by: Andy Lutomirski <luto@amacapital.net> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Kees Cook <keescook@chromium.org> Cc: Andrea Arcangeli <aarcange@redhat.com> Cc: Vince Weaver <vince@deater.net> Cc: "hillf.zj" <hillf.zj@alibaba-inc.com> Cc: Valdis Kletnieks <Valdis.Kletnieks@vt.edu> Cc: Paul Mackerras <paulus@samba.org> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Link: http://lkml.kernel.org/r/3a54dd3353fffbf84804398e00dfdc5b7c1afd7d.1414190806.git.luto@amacapital.net Signed-off-by: Ingo Molnar <mingo@kernel.org>
133 lines
2.7 KiB
C
133 lines
2.7 KiB
C
/* CPU virtualization extensions handling
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*
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* This should carry the code for handling CPU virtualization extensions
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* that needs to live in the kernel core.
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*
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* Author: Eduardo Habkost <ehabkost@redhat.com>
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*
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* Copyright (C) 2008, Red Hat Inc.
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*
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* Contains code from KVM, Copyright (C) 2006 Qumranet, Inc.
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*
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* This work is licensed under the terms of the GNU GPL, version 2. See
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* the COPYING file in the top-level directory.
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*/
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#ifndef _ASM_X86_VIRTEX_H
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#define _ASM_X86_VIRTEX_H
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#include <asm/processor.h>
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#include <asm/vmx.h>
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#include <asm/svm.h>
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#include <asm/tlbflush.h>
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/*
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* VMX functions:
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*/
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static inline int cpu_has_vmx(void)
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{
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unsigned long ecx = cpuid_ecx(1);
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return test_bit(5, &ecx); /* CPUID.1:ECX.VMX[bit 5] -> VT */
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}
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/** Disable VMX on the current CPU
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*
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* vmxoff causes a undefined-opcode exception if vmxon was not run
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* on the CPU previously. Only call this function if you know VMX
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* is enabled.
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*/
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static inline void cpu_vmxoff(void)
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{
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asm volatile (ASM_VMX_VMXOFF : : : "cc");
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cr4_clear_bits(X86_CR4_VMXE);
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}
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static inline int cpu_vmx_enabled(void)
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{
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return __read_cr4() & X86_CR4_VMXE;
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}
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/** Disable VMX if it is enabled on the current CPU
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*
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* You shouldn't call this if cpu_has_vmx() returns 0.
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*/
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static inline void __cpu_emergency_vmxoff(void)
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{
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if (cpu_vmx_enabled())
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cpu_vmxoff();
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}
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/** Disable VMX if it is supported and enabled on the current CPU
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*/
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static inline void cpu_emergency_vmxoff(void)
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{
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if (cpu_has_vmx())
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__cpu_emergency_vmxoff();
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}
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/*
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* SVM functions:
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*/
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/** Check if the CPU has SVM support
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*
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* You can use the 'msg' arg to get a message describing the problem,
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* if the function returns zero. Simply pass NULL if you are not interested
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* on the messages; gcc should take care of not generating code for
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* the messages on this case.
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*/
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static inline int cpu_has_svm(const char **msg)
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{
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uint32_t eax, ebx, ecx, edx;
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if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) {
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if (msg)
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*msg = "not amd";
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return 0;
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}
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cpuid(0x80000000, &eax, &ebx, &ecx, &edx);
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if (eax < SVM_CPUID_FUNC) {
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if (msg)
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*msg = "can't execute cpuid_8000000a";
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return 0;
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}
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cpuid(0x80000001, &eax, &ebx, &ecx, &edx);
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if (!(ecx & (1 << SVM_CPUID_FEATURE_SHIFT))) {
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if (msg)
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*msg = "svm not available";
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return 0;
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}
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return 1;
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}
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/** Disable SVM on the current CPU
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*
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* You should call this only if cpu_has_svm() returned true.
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*/
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static inline void cpu_svm_disable(void)
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{
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uint64_t efer;
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wrmsrl(MSR_VM_HSAVE_PA, 0);
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rdmsrl(MSR_EFER, efer);
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wrmsrl(MSR_EFER, efer & ~EFER_SVME);
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}
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/** Makes sure SVM is disabled, if it is supported on the CPU
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*/
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static inline void cpu_emergency_svm_disable(void)
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{
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if (cpu_has_svm(NULL))
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cpu_svm_disable();
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}
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#endif /* _ASM_X86_VIRTEX_H */
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