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1a9db0a9ea
In commit 15ef17f622
(tty: ar933x_uart: use the clk API to get the uart
clock), the AR933x UART driver for has been converted
to get the uart clock rate via the clock API and it
does not use the platform data anymore.
Remove the ar933x_uart_platform.h header file and get
rid of the superfluous variable and initialization code
in platform setup.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5832/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
109 lines
2.5 KiB
C
109 lines
2.5 KiB
C
/*
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* Atheros AR71XX/AR724X/AR913X common devices
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*
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* Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
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*
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* Parts of this file are based on Atheros' 2.6.15 BSP
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/serial_8250.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <asm/mach-ath79/ath79.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include "common.h"
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#include "dev-common.h"
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static struct resource ath79_uart_resources[] = {
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{
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.start = AR71XX_UART_BASE,
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.end = AR71XX_UART_BASE + AR71XX_UART_SIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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#define AR71XX_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
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static struct plat_serial8250_port ath79_uart_data[] = {
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{
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.mapbase = AR71XX_UART_BASE,
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.irq = ATH79_MISC_IRQ(3),
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.flags = AR71XX_UART_FLAGS,
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.iotype = UPIO_MEM32,
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.regshift = 2,
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}, {
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/* terminating entry */
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}
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};
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static struct platform_device ath79_uart_device = {
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.name = "serial8250",
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.id = PLAT8250_DEV_PLATFORM,
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.resource = ath79_uart_resources,
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.num_resources = ARRAY_SIZE(ath79_uart_resources),
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.dev = {
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.platform_data = ath79_uart_data
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},
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};
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static struct resource ar933x_uart_resources[] = {
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{
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.start = AR933X_UART_BASE,
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.end = AR933X_UART_BASE + AR71XX_UART_SIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = ATH79_MISC_IRQ(3),
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.end = ATH79_MISC_IRQ(3),
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device ar933x_uart_device = {
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.name = "ar933x-uart",
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.id = -1,
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.resource = ar933x_uart_resources,
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.num_resources = ARRAY_SIZE(ar933x_uart_resources),
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};
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void __init ath79_register_uart(void)
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{
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unsigned long uart_clk_rate;
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uart_clk_rate = ath79_get_sys_clk_rate("uart");
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if (soc_is_ar71xx() ||
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soc_is_ar724x() ||
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soc_is_ar913x() ||
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soc_is_ar934x() ||
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soc_is_qca955x()) {
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ath79_uart_data[0].uartclk = uart_clk_rate;
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platform_device_register(&ath79_uart_device);
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} else if (soc_is_ar933x()) {
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platform_device_register(&ar933x_uart_device);
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} else {
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BUG();
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}
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}
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void __init ath79_register_wdt(void)
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{
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struct resource res;
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memset(&res, 0, sizeof(res));
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res.flags = IORESOURCE_MEM;
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res.start = AR71XX_RESET_BASE + AR71XX_RESET_REG_WDOG_CTRL;
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res.end = res.start + 0x8 - 1;
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platform_device_register_simple("ath79-wdt", -1, &res, 1);
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}
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