mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-19 13:18:21 +07:00
5c73cc4b6c
As always, this tends to be one of our bigger branches. There are lots of
updates this release, but not that many jumps out as something that needs
more detailed coverage. Some of the highlights are:
- DTs for the new Annapurna Labs Alpine platform
- More graphics DT pieces falling into place on Exynos, bridges, clocks.
- Plenty of DT updates for Qualcomm platforms for various IP blocks
- Some churn on Tegra due to switch-over to tool-generated pinctrl data
- Misc fixes and updates for Atmel at91 platforms
- Various DT updates to add IP block support on Broadcom's Cygnus platforms
- More updates for Renesas platforms as DT support is added for various IP
blocks (IPMMU, display, audio, etc).
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM DT updates from Olof Johansson:
"As always, this tends to be one of our bigger branches. There are
lots of updates this release, but not that many jumps out as something
that needs more detailed coverage. Some of the highlights are:
- DTs for the new Annapurna Labs Alpine platform
- more graphics DT pieces falling into place on Exynos, bridges,
clocks.
- plenty of DT updates for Qualcomm platforms for various IP blocks
- some churn on Tegra due to switch-over to tool-generated pinctrl
data
- misc fixes and updates for Atmel at91 platforms
- various DT updates to add IP block support on Broadcom's Cygnus
platforms
- more updates for Renesas platforms as DT support is added for
various IP blocks (IPMMU, display, audio, etc)"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (231 commits)
ARM: dts: alpine: add internal pci
Revert "ARM: dts: mt8135: Add pinctrl/GPIO/EINT node for mt8135."
ARM: mvebu: use 0xf1000000 as internal registers on Armada 370 DB
ARM: dts: qcom: Add idle state device nodes for 8064
ARM: dts: qcom: Add idle states device nodes for 8084
ARM: dts: qcom: Add idle states device nodes for 8974/8074
ARM: dts: qcom: Update power-controller device node for 8064 Krait CPUs
ARM: dts: qcom: Add power-controller device node for 8084 Krait CPUs
ARM: dts: qcom: Add power-controller device node for 8074 Krait CPUs
devicetree: bindings: Document qcom,idle-states
devicetree: bindings: Update qcom,saw2 node bindings
dt-bindings: Add #defines for MSM8916 clocks and resets
arm: dts: qcom: Add LPASS Audio HW to IPQ8064 device tree
arm: dts: qcom: Add APQ8084 chipset SPMI PMIC's nodes
arm: dts: qcom: Add 8x74 chipset SPMI PMIC's nodes
arm: dts: qcom: Add SPMI PMIC Arbiter nodes for APQ8084 and MSM8974
arm: dts: qcom: Add LCC nodes
arm: dts: qcom: Add TCSR support for MSM8960
arm: dts: qcom: Add TCSR support for MSM8660
arm: dts: qcom: Add TCSR support for IPQ8064
...
72 lines
2.0 KiB
C
72 lines
2.0 KiB
C
/*
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* SMP support for r8a7790
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*
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* Copyright (C) 2012-2013 Renesas Solutions Corp.
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* Copyright (C) 2012 Takashi Yoshii <takashi.yoshii.ze@renesas.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <linux/io.h>
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#include <asm/smp_plat.h>
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#include "common.h"
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#include "platsmp-apmu.h"
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#include "pm-rcar.h"
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#include "rcar-gen2.h"
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#include "r8a7790.h"
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static struct rcar_sysc_ch r8a7790_ca15_scu = {
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.chan_offs = 0x180, /* PWRSR5 .. PWRER5 */
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.isr_bit = 12, /* CA15-SCU */
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};
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static struct rcar_sysc_ch r8a7790_ca7_scu = {
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.chan_offs = 0x100, /* PWRSR3 .. PWRER3 */
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.isr_bit = 21, /* CA7-SCU */
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};
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static struct rcar_apmu_config r8a7790_apmu_config[] = {
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{
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.iomem = DEFINE_RES_MEM(0xe6152000, 0x188),
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.cpus = { 0, 1, 2, 3 },
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},
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{
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.iomem = DEFINE_RES_MEM(0xe6151000, 0x188),
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.cpus = { 0x100, 0x0101, 0x102, 0x103 },
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}
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};
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static void __init r8a7790_smp_prepare_cpus(unsigned int max_cpus)
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{
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/* let APMU code install data related to shmobile_boot_vector */
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shmobile_smp_apmu_prepare_cpus(max_cpus,
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r8a7790_apmu_config,
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ARRAY_SIZE(r8a7790_apmu_config));
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/* turn on power to SCU */
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rcar_gen2_pm_init();
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rcar_sysc_power_up(&r8a7790_ca15_scu);
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rcar_sysc_power_up(&r8a7790_ca7_scu);
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}
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struct smp_operations r8a7790_smp_ops __initdata = {
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.smp_prepare_cpus = r8a7790_smp_prepare_cpus,
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.smp_boot_secondary = shmobile_smp_apmu_boot_secondary,
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#ifdef CONFIG_HOTPLUG_CPU
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.cpu_disable = shmobile_smp_cpu_disable,
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.cpu_die = shmobile_smp_apmu_cpu_die,
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.cpu_kill = shmobile_smp_apmu_cpu_kill,
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#endif
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};
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