Julian Parkin 2425347697 drm/amd/display: Poll for GPUVM context ready (v2) ... [Why] Hardware docs state that we must wait until the GPUVM context is ready after programming it. [How] Poll until the valid bit of PAGE_TABLE_BASE_ADDR_LO32 is set to 1 after programming it. v2: fix include for udelay (Alex) Signed-off-by: Julian Parkin <julian.parkin@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2019-07-18 14:18:09 -05:00
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dcn20_dccg.c
dcn20_dccg.h
dcn20_dpp_cm.c
dcn20_dpp.c
dcn20_dpp.h
dcn20_dsc.c	drm/amd/display: fix a couple of spelling mistakes	2019-06-27 11:22:57 -05:00
dcn20_dsc.h
dcn20_dwb_scl.c
dcn20_dwb.c
dcn20_dwb.h
dcn20_hubbub.c	drm/amd/display: Set default block_size, even in unexpected cases	2019-07-18 14:18:08 -05:00
dcn20_hubbub.h
dcn20_hubp.c
dcn20_hubp.h	drm/amd/display: Split out common HUBP registers and code	2019-07-18 14:18:08 -05:00
dcn20_hwseq.c	drm/amd/display: add hdmi2.1 dsc pps packet programming	2019-07-18 14:18:09 -05:00
dcn20_hwseq.h	drm/amd/display: Split out common HUBP registers and code	2019-07-18 14:18:08 -05:00
dcn20_link_encoder.c
dcn20_link_encoder.h
dcn20_mmhubbub.c
dcn20_mmhubbub.h
dcn20_mpc.c
dcn20_mpc.h
dcn20_opp.c
dcn20_opp.h
dcn20_optc.c
dcn20_optc.h
dcn20_resource.c	drm/amd/display: early return when pipe_cnt is 0 in bw validation	2019-07-18 14:18:08 -05:00
dcn20_resource.h	drm/amd/display: early return when pipe_cnt is 0 in bw validation	2019-07-18 14:18:08 -05:00
dcn20_stream_encoder.c
dcn20_stream_encoder.h
dcn20_vmid.c	drm/amd/display: Poll for GPUVM context ready (v2)	2019-07-18 14:18:09 -05:00
dcn20_vmid.h
Makefile	drm/amd/display: Support clang option for stack alignment	2019-07-16 13:02:39 -05:00