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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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ed21cfe207
On XLR/XLS, the cpu cores communicate with fast on-chip devices (e.g. network accelerator, security engine etc.) using the Fast Messaging Network(FMN). The FMN queues and credits needs to be configured and intialized before it can be used. The co-processor 2 on XLR/XLS CPU cores has registers for FMN access, and the XLR/XLS has custom instructions for sending and loading messages. The FMN can deliver also per-cpu interrupts when messages are available at the CPU. This patch adds FMN initialization, adds interrupt setup and handling, and also provides support for sending and receiving FMN messages. Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com> Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/4468 Signed-off-by: John Crispin <blogic@openwrt.org>
114 lines
3.6 KiB
C
114 lines
3.6 KiB
C
/*
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* Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
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* reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the NetLogic
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* license below:
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
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* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
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* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
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* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _NETLOGIC_COMMON_H_
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#define _NETLOGIC_COMMON_H_
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/*
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* Common SMP definitions
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*/
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#define RESET_VEC_PHYS 0x1fc00000
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#define RESET_DATA_PHYS (RESET_VEC_PHYS + (1<<10))
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#define BOOT_THREAD_MODE 0
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#define BOOT_NMI_LOCK 4
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#define BOOT_NMI_HANDLER 8
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#ifndef __ASSEMBLY__
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#include <linux/cpumask.h>
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#include <linux/spinlock.h>
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#include <asm/irq.h>
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#include <asm/mach-netlogic/multi-node.h>
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struct irq_desc;
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void nlm_smp_function_ipi_handler(unsigned int irq, struct irq_desc *desc);
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void nlm_smp_resched_ipi_handler(unsigned int irq, struct irq_desc *desc);
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void nlm_smp_irq_init(int hwcpuid);
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void nlm_boot_secondary_cpus(void);
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int nlm_wakeup_secondary_cpus(void);
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void nlm_rmiboot_preboot(void);
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void nlm_percpu_init(int hwcpuid);
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static inline void
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nlm_set_nmi_handler(void *handler)
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{
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char *reset_data;
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reset_data = (char *)CKSEG1ADDR(RESET_DATA_PHYS);
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*(int64_t *)(reset_data + BOOT_NMI_HANDLER) = (long)handler;
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}
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/*
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* Misc.
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*/
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unsigned int nlm_get_cpu_frequency(void);
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void nlm_node_init(int node);
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extern struct plat_smp_ops nlm_smp_ops;
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extern char nlm_reset_entry[], nlm_reset_entry_end[];
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extern unsigned int nlm_threads_per_core;
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extern cpumask_t nlm_cpumask;
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struct nlm_soc_info {
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unsigned long coremask; /* cores enabled on the soc */
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unsigned long ebase;
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uint64_t irqmask;
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uint64_t sysbase; /* only for XLP */
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uint64_t picbase;
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spinlock_t piclock;
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};
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#define nlm_get_node(i) (&nlm_nodes[i])
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#ifdef CONFIG_CPU_XLR
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#define nlm_current_node() (&nlm_nodes[0])
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#else
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#define nlm_current_node() (&nlm_nodes[nlm_nodeid()])
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#endif
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struct irq_data;
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uint64_t nlm_pci_irqmask(int node);
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void nlm_set_pic_extra_ack(int node, int irq, void (*xack)(struct irq_data *));
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/*
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* The NR_IRQs is divided between nodes, each of them has a separate irq space
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*/
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static inline int nlm_irq_to_xirq(int node, int irq)
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{
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return node * NR_IRQS / NLM_NR_NODES + irq;
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}
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extern struct nlm_soc_info nlm_nodes[NLM_NR_NODES];
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extern int nlm_cpu_ready[];
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#endif
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#endif /* _NETLOGIC_COMMON_H_ */
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