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5336f75499
Several functions are documented at edac_device.c. As we'll be including edac_core.h at drivers-api book, move those, in order for the kernel-doc markups be part of the API documentation book. As several of those kernel-doc macros are not in the right format, fix them. Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
321 lines
9.1 KiB
C
321 lines
9.1 KiB
C
/*
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* Defines, structures, APIs for edac_device
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*
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* (C) 2007 Linux Networx (http://lnxi.com)
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* This file may be distributed under the terms of the
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* GNU General Public License.
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*
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* Written by Thayne Harbaugh
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* Based on work by Dan Hollis <goemon at anime dot net> and others.
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* http://www.anime.net/~goemon/linux-ecc/
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*
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* NMI handling support added by
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* Dave Peterson <dsp@llnl.gov> <dave_peterson@pobox.com>
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*
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* Refactored for multi-source files:
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* Doug Thompson <norsk5@xmission.com>
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*
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* Please look at Documentation/driver-api/edac.rst for more info about
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* EDAC core structs and functions.
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*/
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#ifndef _EDAC_DEVICE_H_
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#define _EDAC_DEVICE_H_
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#include <linux/completion.h>
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#include <linux/device.h>
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#include <linux/edac.h>
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#include <linux/kobject.h>
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#include <linux/list.h>
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#include <linux/types.h>
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#include <linux/sysfs.h>
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#include <linux/workqueue.h>
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/*
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* The following are the structures to provide for a generic
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* or abstract 'edac_device'. This set of structures and the
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* code that implements the APIs for the same, provide for
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* registering EDAC type devices which are NOT standard memory.
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*
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* CPU caches (L1 and L2)
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* DMA engines
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* Core CPU switches
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* Fabric switch units
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* PCIe interface controllers
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* other EDAC/ECC type devices that can be monitored for
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* errors, etc.
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*
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* It allows for a 2 level set of hierarchy. For example:
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*
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* cache could be composed of L1, L2 and L3 levels of cache.
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* Each CPU core would have its own L1 cache, while sharing
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* L2 and maybe L3 caches.
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*
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* View them arranged, via the sysfs presentation:
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* /sys/devices/system/edac/..
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*
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* mc/ <existing memory device directory>
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* cpu/cpu0/.. <L1 and L2 block directory>
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* /L1-cache/ce_count
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* /ue_count
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* /L2-cache/ce_count
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* /ue_count
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* cpu/cpu1/.. <L1 and L2 block directory>
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* /L1-cache/ce_count
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* /ue_count
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* /L2-cache/ce_count
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* /ue_count
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* ...
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*
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* the L1 and L2 directories would be "edac_device_block's"
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*/
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struct edac_device_counter {
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u32 ue_count;
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u32 ce_count;
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};
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/* forward reference */
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struct edac_device_ctl_info;
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struct edac_device_block;
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/* edac_dev_sysfs_attribute structure
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* used for driver sysfs attributes in mem_ctl_info
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* for extra controls and attributes:
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* like high level error Injection controls
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*/
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struct edac_dev_sysfs_attribute {
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struct attribute attr;
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ssize_t (*show)(struct edac_device_ctl_info *, char *);
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ssize_t (*store)(struct edac_device_ctl_info *, const char *, size_t);
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};
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/* edac_dev_sysfs_block_attribute structure
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*
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* used in leaf 'block' nodes for adding controls/attributes
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*
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* each block in each instance of the containing control structure
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* can have an array of the following. The show and store functions
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* will be filled in with the show/store function in the
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* low level driver.
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*
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* The 'value' field will be the actual value field used for
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* counting
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*/
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struct edac_dev_sysfs_block_attribute {
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struct attribute attr;
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ssize_t (*show)(struct kobject *, struct attribute *, char *);
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ssize_t (*store)(struct kobject *, struct attribute *,
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const char *, size_t);
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struct edac_device_block *block;
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unsigned int value;
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};
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/* device block control structure */
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struct edac_device_block {
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struct edac_device_instance *instance; /* Up Pointer */
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char name[EDAC_DEVICE_NAME_LEN + 1];
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struct edac_device_counter counters; /* basic UE and CE counters */
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int nr_attribs; /* how many attributes */
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/* this block's attributes, could be NULL */
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struct edac_dev_sysfs_block_attribute *block_attributes;
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/* edac sysfs device control */
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struct kobject kobj;
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};
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/* device instance control structure */
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struct edac_device_instance {
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struct edac_device_ctl_info *ctl; /* Up pointer */
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char name[EDAC_DEVICE_NAME_LEN + 4];
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struct edac_device_counter counters; /* instance counters */
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u32 nr_blocks; /* how many blocks */
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struct edac_device_block *blocks; /* block array */
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/* edac sysfs device control */
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struct kobject kobj;
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};
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/*
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* Abstract edac_device control info structure
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*
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*/
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struct edac_device_ctl_info {
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/* for global list of edac_device_ctl_info structs */
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struct list_head link;
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struct module *owner; /* Module owner of this control struct */
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int dev_idx;
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/* Per instance controls for this edac_device */
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int log_ue; /* boolean for logging UEs */
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int log_ce; /* boolean for logging CEs */
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int panic_on_ue; /* boolean for panic'ing on an UE */
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unsigned poll_msec; /* number of milliseconds to poll interval */
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unsigned long delay; /* number of jiffies for poll_msec */
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/* Additional top controller level attributes, but specified
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* by the low level driver.
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*
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* Set by the low level driver to provide attributes at the
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* controller level, same level as 'ue_count' and 'ce_count' above.
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* An array of structures, NULL terminated
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*
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* If attributes are desired, then set to array of attributes
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* If no attributes are desired, leave NULL
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*/
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struct edac_dev_sysfs_attribute *sysfs_attributes;
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/* pointer to main 'edac' subsys in sysfs */
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struct bus_type *edac_subsys;
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/* the internal state of this controller instance */
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int op_state;
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/* work struct for this instance */
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struct delayed_work work;
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/* pointer to edac polling checking routine:
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* If NOT NULL: points to polling check routine
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* If NULL: Then assumes INTERRUPT operation, where
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* MC driver will receive events
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*/
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void (*edac_check) (struct edac_device_ctl_info * edac_dev);
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struct device *dev; /* pointer to device structure */
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const char *mod_name; /* module name */
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const char *ctl_name; /* edac controller name */
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const char *dev_name; /* pci/platform/etc... name */
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void *pvt_info; /* pointer to 'private driver' info */
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unsigned long start_time; /* edac_device load start time (jiffies) */
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struct completion removal_complete;
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/* sysfs top name under 'edac' directory
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* and instance name:
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* cpu/cpu0/...
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* cpu/cpu1/...
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* cpu/cpu2/...
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* ...
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*/
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char name[EDAC_DEVICE_NAME_LEN + 1];
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/* Number of instances supported on this control structure
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* and the array of those instances
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*/
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u32 nr_instances;
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struct edac_device_instance *instances;
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/* Event counters for the this whole EDAC Device */
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struct edac_device_counter counters;
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/* edac sysfs device control for the 'name'
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* device this structure controls
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*/
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struct kobject kobj;
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};
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/* To get from the instance's wq to the beginning of the ctl structure */
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#define to_edac_mem_ctl_work(w) \
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container_of(w, struct mem_ctl_info, work)
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#define to_edac_device_ctl_work(w) \
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container_of(w,struct edac_device_ctl_info,work)
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/*
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* The alloc() and free() functions for the 'edac_device' control info
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* structure. A MC driver will allocate one of these for each edac_device
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* it is going to control/register with the EDAC CORE.
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*/
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extern struct edac_device_ctl_info *edac_device_alloc_ctl_info(
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unsigned sizeof_private,
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char *edac_device_name, unsigned nr_instances,
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char *edac_block_name, unsigned nr_blocks,
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unsigned offset_value,
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struct edac_dev_sysfs_block_attribute *block_attributes,
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unsigned nr_attribs,
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int device_index);
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/* The offset value can be:
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* -1 indicating no offset value
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* 0 for zero-based block numbers
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* 1 for 1-based block number
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* other for other-based block number
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*/
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#define BLOCK_OFFSET_VALUE_OFF ((unsigned) -1)
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extern void edac_device_free_ctl_info(struct edac_device_ctl_info *ctl_info);
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/**
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* edac_device_add_device: Insert the 'edac_dev' structure into the
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* edac_device global list and create sysfs entries associated with
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* edac_device structure.
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*
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* @edac_dev: pointer to edac_device structure to be added to the list
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* 'edac_device' structure.
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*
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* Returns:
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* 0 on Success, or an error code on failure
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*/
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extern int edac_device_add_device(struct edac_device_ctl_info *edac_dev);
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/**
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* edac_device_del_device:
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* Remove sysfs entries for specified edac_device structure and
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* then remove edac_device structure from global list
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*
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* @dev:
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* Pointer to struct &device representing the edac device
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* structure to remove.
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*
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* Returns:
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* Pointer to removed edac_device structure,
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* or %NULL if device not found.
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*/
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extern struct edac_device_ctl_info *edac_device_del_device(struct device *dev);
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/**
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* edac_device_handle_ue():
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* perform a common output and handling of an 'edac_dev' UE event
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*
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* @edac_dev: pointer to struct &edac_device_ctl_info
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* @inst_nr: number of the instance where the UE error happened
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* @block_nr: number of the block where the UE error happened
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* @msg: message to be printed
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*/
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extern void edac_device_handle_ue(struct edac_device_ctl_info *edac_dev,
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int inst_nr, int block_nr, const char *msg);
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/**
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* edac_device_handle_ce():
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* perform a common output and handling of an 'edac_dev' CE event
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*
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* @edac_dev: pointer to struct &edac_device_ctl_info
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* @inst_nr: number of the instance where the CE error happened
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* @block_nr: number of the block where the CE error happened
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* @msg: message to be printed
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*/
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extern void edac_device_handle_ce(struct edac_device_ctl_info *edac_dev,
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int inst_nr, int block_nr, const char *msg);
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/**
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* edac_device_alloc_index: Allocate a unique device index number
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*
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* Returns:
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* allocated index number
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*/
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extern int edac_device_alloc_index(void);
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extern const char *edac_layer_name[];
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#endif
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