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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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de5792a4ec
This is the first patch of two to clean up/update the Xtalk detection code used by IP27 with some of the code used in the IP30 port. This specific patch adds Xtalk widget manufacturer and widget device numbers to arch/mips/include/asm/xtalk/widget.h Signed-off-by: Joshua Kinard <kumba@gentoo.org> Cc: Linux MIPS List <linux-mips@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/10174/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
280 lines
7.5 KiB
C
280 lines
7.5 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* xwidget.h - generic crosstalk widget header file, derived from IRIX
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* <sys/xtalk/xtalkwidget.h>, revision 1.32.
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*
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* Copyright (C) 1996, 1999 Silcon Graphics, Inc.
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* Copyright (C) 1999 Ralf Baechle (ralf@gnu.org)
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*/
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#ifndef _ASM_XTALK_XWIDGET_H
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#define _ASM_XTALK_XWIDGET_H
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#include <linux/types.h>
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#include <asm/xtalk/xtalk.h>
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#define WIDGET_ID 0x04
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#define WIDGET_STATUS 0x0c
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#define WIDGET_ERR_UPPER_ADDR 0x14
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#define WIDGET_ERR_LOWER_ADDR 0x1c
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#define WIDGET_CONTROL 0x24
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#define WIDGET_REQ_TIMEOUT 0x2c
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#define WIDGET_INTDEST_UPPER_ADDR 0x34
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#define WIDGET_INTDEST_LOWER_ADDR 0x3c
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#define WIDGET_ERR_CMD_WORD 0x44
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#define WIDGET_LLP_CFG 0x4c
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#define WIDGET_TFLUSH 0x54
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/* WIDGET_ID */
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#define WIDGET_REV_NUM 0xf0000000
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#define WIDGET_PART_NUM 0x0ffff000
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#define WIDGET_MFG_NUM 0x00000ffe
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#define WIDGET_REV_NUM_SHFT 28
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#define WIDGET_PART_NUM_SHFT 12
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#define WIDGET_MFG_NUM_SHFT 1
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#define XWIDGET_PART_NUM(widgetid) (((widgetid) & WIDGET_PART_NUM) >> WIDGET_PART_NUM_SHFT)
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#define XWIDGET_REV_NUM(widgetid) (((widgetid) & WIDGET_REV_NUM) >> WIDGET_REV_NUM_SHFT)
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#define XWIDGET_MFG_NUM(widgetid) (((widgetid) & WIDGET_MFG_NUM) >> WIDGET_MFG_NUM_SHFT)
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/* WIDGET_STATUS */
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#define WIDGET_LLP_REC_CNT 0xff000000
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#define WIDGET_LLP_TX_CNT 0x00ff0000
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#define WIDGET_PENDING 0x0000001f
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/* WIDGET_ERR_UPPER_ADDR */
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#define WIDGET_ERR_UPPER_ADDR_ONLY 0x0000ffff
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/* WIDGET_CONTROL */
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#define WIDGET_F_BAD_PKT 0x00010000
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#define WIDGET_LLP_XBAR_CRD 0x0000f000
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#define WIDGET_LLP_XBAR_CRD_SHFT 12
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#define WIDGET_CLR_RLLP_CNT 0x00000800
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#define WIDGET_CLR_TLLP_CNT 0x00000400
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#define WIDGET_SYS_END 0x00000200
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#define WIDGET_MAX_TRANS 0x000001f0
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#define WIDGET_WIDGET_ID 0x0000000f
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/* WIDGET_INTDEST_UPPER_ADDR */
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#define WIDGET_INT_VECTOR 0xff000000
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#define WIDGET_INT_VECTOR_SHFT 24
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#define WIDGET_TARGET_ID 0x000f0000
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#define WIDGET_TARGET_ID_SHFT 16
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#define WIDGET_UPP_ADDR 0x0000ffff
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/* WIDGET_ERR_CMD_WORD */
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#define WIDGET_DIDN 0xf0000000
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#define WIDGET_SIDN 0x0f000000
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#define WIDGET_PACTYP 0x00f00000
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#define WIDGET_TNUM 0x000f8000
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#define WIDGET_COHERENT 0x00004000
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#define WIDGET_DS 0x00003000
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#define WIDGET_GBR 0x00000800
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#define WIDGET_VBPM 0x00000400
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#define WIDGET_ERROR 0x00000200
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#define WIDGET_BARRIER 0x00000100
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/* WIDGET_LLP_CFG */
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#define WIDGET_LLP_MAXRETRY 0x03ff0000
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#define WIDGET_LLP_MAXRETRY_SHFT 16
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#define WIDGET_LLP_NULLTIMEOUT 0x0000fc00
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#define WIDGET_LLP_NULLTIMEOUT_SHFT 10
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#define WIDGET_LLP_MAXBURST 0x000003ff
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#define WIDGET_LLP_MAXBURST_SHFT 0
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/* Xtalk Widget Device Mfgr Nums */
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#define WIDGET_XBOW_MFGR_NUM 0x0 /* IP30 XBow Chip */
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#define WIDGET_XXBOW_MFGR_NUM 0x0 /* IP35 Xbow + XBridge Chip */
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#define WIDGET_ODYS_MFGR_NUM 0x023 /* Odyssey / VPro GFX */
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#define WIDGET_TPU_MFGR_NUM 0x024 /* Tensor Processor Unit */
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#define WIDGET_XBRDG_MFGR_NUM 0x024 /* IP35 XBridge Chip */
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#define WIDGET_HEART_MFGR_NUM 0x036 /* IP30 HEART Chip */
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#define WIDGET_BRIDG_MFGR_NUM 0x036 /* PCI Bridge */
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#define WIDGET_HUB_MFGR_NUM 0x036 /* IP27 Hub Chip */
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#define WIDGET_BDRCK_MFGR_NUM 0x036 /* IP35 Bedrock Chip */
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#define WIDGET_IMPCT_MFGR_NUM 0x2aa /* HQ4 / Impact GFX */
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#define WIDGET_KONA_MFGR_NUM 0x2aa /* InfiniteReality3 / Kona GFX */
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#define WIDGET_NULL_MFGR_NUM -1 /* NULL */
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/* Xtalk Widget Device Part Nums */
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#define WIDGET_XBOW_PART_NUM 0x0000
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#define WIDGET_HEART_PART_NUM 0xc001
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#define WIDGET_BRIDG_PART_NUM 0xc002
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#define WIDGET_IMPCT_PART_NUM 0xc003
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#define WIDGET_ODYS_PART_NUM 0xc013
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#define WIDGET_HUB_PART_NUM 0xc101
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#define WIDGET_KONA_PART_NUM 0xc102
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#define WIDGET_BDRCK_PART_NUM 0xc110
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#define WIDGET_TPU_PART_NUM 0xc202
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#define WIDGET_XXBOW_PART_NUM 0xd000
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#define WIDGET_XBRDG_PART_NUM 0xd002
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#define WIDGET_NULL_PART_NUM -1
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/* For Xtalk Widget identification */
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struct widget_ident {
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u32 mfgr;
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u32 part;
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char *name;
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char *revs[16];
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};
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/* Known Xtalk Widgets */
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static const struct widget_ident __initconst widget_idents[] = {
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{
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WIDGET_XBOW_MFGR_NUM,
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WIDGET_XBOW_PART_NUM,
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"xbow",
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{NULL, "1.0", "1.1", "1.2", "1.3", "2.0", NULL},
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},
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{
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WIDGET_HEART_MFGR_NUM,
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WIDGET_HEART_PART_NUM,
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"heart",
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{NULL, "A", "B", "C", "D", "E", "F", NULL},
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},
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{
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WIDGET_BRIDG_MFGR_NUM,
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WIDGET_BRIDG_PART_NUM,
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"bridge",
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{NULL, "A", "B", "C", "D", NULL},
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},
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{
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WIDGET_IMPCT_MFGR_NUM,
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WIDGET_IMPCT_PART_NUM,
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"impact",
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{NULL, "A", "B", NULL},
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},
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{
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WIDGET_ODYS_MFGR_NUM,
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WIDGET_ODYS_PART_NUM,
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"odyssey",
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{NULL, "A", "B", NULL},
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},
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{
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WIDGET_HUB_MFGR_NUM,
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WIDGET_HUB_PART_NUM,
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"hub",
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{NULL, "1.0", "2.0", "2.1", "2.2", "2.3", "2.4", NULL},
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},
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{
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WIDGET_KONA_MFGR_NUM,
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WIDGET_KONA_PART_NUM,
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"kona",
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{NULL},
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},
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{
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WIDGET_BDRCK_MFGR_NUM,
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WIDGET_BDRCK_PART_NUM,
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"bedrock",
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{NULL, "1.0", "1.1", NULL},
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},
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{
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WIDGET_TPU_MFGR_NUM,
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WIDGET_TPU_PART_NUM,
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"tpu",
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{"0", NULL},
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},
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{
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WIDGET_XXBOW_MFGR_NUM,
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WIDGET_XXBOW_PART_NUM,
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"xxbow",
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{NULL, "1.0", "2.0", NULL},
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},
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{
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WIDGET_XBRDG_MFGR_NUM,
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WIDGET_XBRDG_PART_NUM,
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"xbridge",
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{NULL, "A", "B", NULL},
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},
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{
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WIDGET_NULL_MFGR_NUM,
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WIDGET_NULL_PART_NUM,
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NULL,
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{NULL},
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}
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};
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/*
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* according to the crosstalk spec, only 32-bits access to the widget
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* configuration registers is allowed. some widgets may allow 64-bits
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* access but software should not depend on it. registers beyond the
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* widget target flush register are widget dependent thus will not be
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* defined here
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*/
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#ifndef __ASSEMBLY__
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typedef u32 widgetreg_t;
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/* widget configuration registers */
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typedef volatile struct widget_cfg {
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widgetreg_t w_pad_0; /* 0x00 */
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widgetreg_t w_id; /* 0x04 */
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widgetreg_t w_pad_1; /* 0x08 */
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widgetreg_t w_status; /* 0x0c */
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widgetreg_t w_pad_2; /* 0x10 */
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widgetreg_t w_err_upper_addr; /* 0x14 */
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widgetreg_t w_pad_3; /* 0x18 */
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widgetreg_t w_err_lower_addr; /* 0x1c */
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widgetreg_t w_pad_4; /* 0x20 */
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widgetreg_t w_control; /* 0x24 */
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widgetreg_t w_pad_5; /* 0x28 */
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widgetreg_t w_req_timeout; /* 0x2c */
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widgetreg_t w_pad_6; /* 0x30 */
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widgetreg_t w_intdest_upper_addr; /* 0x34 */
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widgetreg_t w_pad_7; /* 0x38 */
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widgetreg_t w_intdest_lower_addr; /* 0x3c */
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widgetreg_t w_pad_8; /* 0x40 */
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widgetreg_t w_err_cmd_word; /* 0x44 */
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widgetreg_t w_pad_9; /* 0x48 */
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widgetreg_t w_llp_cfg; /* 0x4c */
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widgetreg_t w_pad_10; /* 0x50 */
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widgetreg_t w_tflush; /* 0x54 */
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} widget_cfg_t;
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typedef struct {
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unsigned didn:4;
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unsigned sidn:4;
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unsigned pactyp:4;
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unsigned tnum:5;
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unsigned ct:1;
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unsigned ds:2;
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unsigned gbr:1;
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unsigned vbpm:1;
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unsigned error:1;
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unsigned bo:1;
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unsigned other:8;
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} w_err_cmd_word_f;
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typedef union {
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widgetreg_t r;
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w_err_cmd_word_f f;
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} w_err_cmd_word_u;
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typedef struct xwidget_info_s *xwidget_info_t;
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/*
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* Crosstalk Widget Hardware Identification, as defined in the Crosstalk spec.
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*/
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typedef struct xwidget_hwid_s {
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xwidget_part_num_t part_num;
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xwidget_rev_num_t rev_num;
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xwidget_mfg_num_t mfg_num;
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} *xwidget_hwid_t;
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/*
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* Returns 1 if a driver that handles devices described by hwid1 is able
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* to manage a device with hardwareid hwid2. NOTE: We don't check rev
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* numbers at all.
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*/
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#define XWIDGET_HARDWARE_ID_MATCH(hwid1, hwid2) \
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(((hwid1)->part_num == (hwid2)->part_num) && \
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(((hwid1)->mfg_num == XWIDGET_MFG_NUM_NONE) || \
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((hwid2)->mfg_num == XWIDGET_MFG_NUM_NONE) || \
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((hwid1)->mfg_num == (hwid2)->mfg_num)))
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#endif /* !__ASSEMBLY__ */
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#endif /* _ASM_XTALK_XWIDGET_H */
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