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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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a5ff1b34e1
Commit 97f2645f35 ("tree-wide: replace config_enabled() with
IS_ENABLED()") mostly killed config_enabled(), but some new users have
appeared for v4.8-rc1. They are all used for a boolean option, so can
be replaced with IS_ENABLED() safely.
Link: http://lkml.kernel.org/r/1471970749-24867-1-git-send-email-yamada.masahiro@socionext.com
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Kees Cook <keescook@chromium.org>
Acked-by: Peter Oberparleiter <oberpar@linux.vnet.ibm.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
262 lines
7.2 KiB
C
262 lines
7.2 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1994 - 1999, 2000, 03 Ralf Baechle
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* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
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*/
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#ifndef _ASM_PAGE_H
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#define _ASM_PAGE_H
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#include <spaces.h>
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#include <linux/const.h>
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#include <linux/kernel.h>
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#include <asm/mipsregs.h>
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/*
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* PAGE_SHIFT determines the page size
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*/
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#ifdef CONFIG_PAGE_SIZE_4KB
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#define PAGE_SHIFT 12
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#endif
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#ifdef CONFIG_PAGE_SIZE_8KB
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#define PAGE_SHIFT 13
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#endif
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#ifdef CONFIG_PAGE_SIZE_16KB
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#define PAGE_SHIFT 14
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#endif
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#ifdef CONFIG_PAGE_SIZE_32KB
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#define PAGE_SHIFT 15
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#endif
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#ifdef CONFIG_PAGE_SIZE_64KB
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#define PAGE_SHIFT 16
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#endif
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#define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT)
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#define PAGE_MASK (~((1 << PAGE_SHIFT) - 1))
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/*
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* This is used for calculating the real page sizes
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* for FTLB or VTLB + FTLB configurations.
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*/
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static inline unsigned int page_size_ftlb(unsigned int mmuextdef)
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{
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switch (mmuextdef) {
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case MIPS_CONF4_MMUEXTDEF_FTLBSIZEEXT:
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if (PAGE_SIZE == (1 << 30))
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return 5;
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if (PAGE_SIZE == (1llu << 32))
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return 6;
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if (PAGE_SIZE > (256 << 10))
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return 7; /* reserved */
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/* fall through */
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case MIPS_CONF4_MMUEXTDEF_VTLBSIZEEXT:
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return (PAGE_SHIFT - 10) / 2;
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default:
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panic("Invalid FTLB configuration with Conf4_mmuextdef=%d value\n",
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mmuextdef >> 14);
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}
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}
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#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
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#define HPAGE_SHIFT (PAGE_SHIFT + PAGE_SHIFT - 3)
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#define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT)
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#define HPAGE_MASK (~(HPAGE_SIZE - 1))
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#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
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#else /* !CONFIG_MIPS_HUGE_TLB_SUPPORT */
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#define HPAGE_SHIFT ({BUILD_BUG(); 0; })
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#define HPAGE_SIZE ({BUILD_BUG(); 0; })
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#define HPAGE_MASK ({BUILD_BUG(); 0; })
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#define HUGETLB_PAGE_ORDER ({BUILD_BUG(); 0; })
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#endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */
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#include <linux/pfn.h>
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extern void build_clear_page(void);
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extern void build_copy_page(void);
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/*
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* It's normally defined only for FLATMEM config but it's
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* used in our early mem init code for all memory models.
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* So always define it.
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*/
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#define ARCH_PFN_OFFSET PFN_UP(PHYS_OFFSET)
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extern void clear_page(void * page);
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extern void copy_page(void * to, void * from);
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extern unsigned long shm_align_mask;
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static inline unsigned long pages_do_alias(unsigned long addr1,
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unsigned long addr2)
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{
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return (addr1 ^ addr2) & shm_align_mask;
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}
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struct page;
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static inline void clear_user_page(void *addr, unsigned long vaddr,
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struct page *page)
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{
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extern void (*flush_data_cache_page)(unsigned long addr);
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clear_page(addr);
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if (pages_do_alias((unsigned long) addr, vaddr & PAGE_MASK))
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flush_data_cache_page((unsigned long)addr);
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}
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struct vm_area_struct;
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extern void copy_user_highpage(struct page *to, struct page *from,
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unsigned long vaddr, struct vm_area_struct *vma);
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#define __HAVE_ARCH_COPY_USER_HIGHPAGE
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/*
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* These are used to make use of C type-checking..
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*/
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#ifdef CONFIG_PHYS_ADDR_T_64BIT
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#ifdef CONFIG_CPU_MIPS32
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typedef struct { unsigned long pte_low, pte_high; } pte_t;
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#define pte_val(x) ((x).pte_low | ((unsigned long long)(x).pte_high << 32))
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#define __pte(x) ({ pte_t __pte = {(x), ((unsigned long long)(x)) >> 32}; __pte; })
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#else
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typedef struct { unsigned long long pte; } pte_t;
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#define pte_val(x) ((x).pte)
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#define __pte(x) ((pte_t) { (x) } )
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#endif
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#else
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typedef struct { unsigned long pte; } pte_t;
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#define pte_val(x) ((x).pte)
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#define __pte(x) ((pte_t) { (x) } )
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#endif
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typedef struct page *pgtable_t;
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/*
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* Right now we don't support 4-level pagetables, so all pud-related
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* definitions come from <asm-generic/pgtable-nopud.h>.
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*/
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/*
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* Finall the top of the hierarchy, the pgd
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*/
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typedef struct { unsigned long pgd; } pgd_t;
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#define pgd_val(x) ((x).pgd)
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#define __pgd(x) ((pgd_t) { (x) } )
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/*
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* Manipulate page protection bits
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*/
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typedef struct { unsigned long pgprot; } pgprot_t;
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#define pgprot_val(x) ((x).pgprot)
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#define __pgprot(x) ((pgprot_t) { (x) } )
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/*
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* On R4000-style MMUs where a TLB entry is mapping a adjacent even / odd
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* pair of pages we only have a single global bit per pair of pages. When
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* writing to the TLB make sure we always have the bit set for both pages
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* or none. This macro is used to access the `buddy' of the pte we're just
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* working on.
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*/
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#define ptep_buddy(x) ((pte_t *)((unsigned long)(x) ^ sizeof(pte_t)))
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/*
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* __pa()/__va() should be used only during mem init.
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*/
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static inline unsigned long ___pa(unsigned long x)
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{
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if (IS_ENABLED(CONFIG_64BIT)) {
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/*
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* For MIPS64 the virtual address may either be in one of
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* the compatibility segements ckseg0 or ckseg1, or it may
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* be in xkphys.
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*/
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return x < CKSEG0 ? XPHYSADDR(x) : CPHYSADDR(x);
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}
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if (!IS_ENABLED(CONFIG_EVA)) {
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/*
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* We're using the standard MIPS32 legacy memory map, ie.
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* the address x is going to be in kseg0 or kseg1. We can
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* handle either case by masking out the desired bits using
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* CPHYSADDR.
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*/
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return CPHYSADDR(x);
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}
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/*
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* EVA is in use so the memory map could be anything, making it not
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* safe to just mask out bits.
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*/
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return x - PAGE_OFFSET + PHYS_OFFSET;
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}
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#define __pa(x) ___pa((unsigned long)(x))
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#define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET - PHYS_OFFSET))
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#include <asm/io.h>
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/*
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* RELOC_HIDE was originally added by 6007b903dfe5f1d13e0c711ac2894bdd4a61b1ad
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* (lmo) rsp. 8431fd094d625b94d364fe393076ccef88e6ce18 (kernel.org). The
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* discussion can be found in lkml posting
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* <a2ebde260608230500o3407b108hc03debb9da6e62c@mail.gmail.com> which is
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* archived at http://lists.linuxcoding.com/kernel/2006-q3/msg17360.html
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*
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* It is unclear if the misscompilations mentioned in
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* http://lkml.org/lkml/2010/8/8/138 also affect MIPS so we keep this one
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* until GCC 3.x has been retired before we can apply
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* https://patchwork.linux-mips.org/patch/1541/
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*/
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#ifndef __pa_symbol
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#define __pa_symbol(x) __pa(RELOC_HIDE((unsigned long)(x), 0))
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#endif
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#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
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#ifdef CONFIG_FLATMEM
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static inline int pfn_valid(unsigned long pfn)
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{
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/* avoid <linux/mm.h> include hell */
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extern unsigned long max_mapnr;
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unsigned long pfn_offset = ARCH_PFN_OFFSET;
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return pfn >= pfn_offset && pfn < max_mapnr;
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}
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#elif defined(CONFIG_SPARSEMEM)
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/* pfn_valid is defined in linux/mmzone.h */
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#elif defined(CONFIG_NEED_MULTIPLE_NODES)
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#define pfn_valid(pfn) \
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({ \
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unsigned long __pfn = (pfn); \
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int __n = pfn_to_nid(__pfn); \
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((__n >= 0) ? (__pfn < NODE_DATA(__n)->node_start_pfn + \
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NODE_DATA(__n)->node_spanned_pages) \
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: 0); \
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})
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#endif
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#define virt_to_page(kaddr) pfn_to_page(PFN_DOWN(virt_to_phys((void *) \
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(kaddr))))
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extern int __virt_addr_valid(const volatile void *kaddr);
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#define virt_addr_valid(kaddr) \
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__virt_addr_valid((const volatile void *) (kaddr))
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#define VM_DATA_DEFAULT_FLAGS \
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(VM_READ | VM_WRITE | \
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((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0) | \
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VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
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#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE)
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#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET)
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#include <asm-generic/memory_model.h>
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#include <asm-generic/getorder.h>
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#endif /* _ASM_PAGE_H */
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