linux_dsm_epyc7002/drivers/clk/tegra
Thierry Reding e1595d89ae clk: tegra: dfll: Properly protect OPP list
The OPP list needs to be protected against concurrent accesses. Using
simple RCU read locks does the trick and gets rid of the following
lockdep warning:

	===============================
	[ INFO: suspicious RCU usage. ]
	4.2.0-next-20150908 #1 Not tainted
	-------------------------------
	drivers/base/power/opp.c:460 Missing rcu_read_lock() or dev_opp_list_lock protection!

	other info that might help us debug this:

	rcu_scheduler_active = 1, debug_locks = 0
	4 locks held by kworker/u8:0/6:
	 #0:  ("%s""deferwq"){++++.+}, at: [<c0040d8c>] process_one_work+0x118/0x4bc
	 #1:  (deferred_probe_work){+.+.+.}, at: [<c0040d8c>] process_one_work+0x118/0x4bc
	 #2:  (&dev->mutex){......}, at: [<c03b8194>] __device_attach+0x20/0x118
	 #3:  (prepare_lock){+.+...}, at: [<c054bc08>] clk_prepare_lock+0x10/0xf8

	stack backtrace:
	CPU: 2 PID: 6 Comm: kworker/u8:0 Not tainted 4.2.0-next-20150908 #1
	Hardware name: NVIDIA Tegra SoC (Flattened Device Tree)
	Workqueue: deferwq deferred_probe_work_func
	[<c001802c>] (unwind_backtrace) from [<c00135a4>] (show_stack+0x10/0x14)
	[<c00135a4>] (show_stack) from [<c02a8418>] (dump_stack+0x94/0xd4)
	[<c02a8418>] (dump_stack) from [<c03c6f6c>] (dev_pm_opp_find_freq_ceil+0x108/0x114)
	[<c03c6f6c>] (dev_pm_opp_find_freq_ceil) from [<c0551a3c>] (dfll_calculate_rate_request+0xb8/0x170)
	[<c0551a3c>] (dfll_calculate_rate_request) from [<c0551b10>] (dfll_clk_round_rate+0x1c/0x2c)
	[<c0551b10>] (dfll_clk_round_rate) from [<c054de2c>] (clk_calc_new_rates+0x1b8/0x228)
	[<c054de2c>] (clk_calc_new_rates) from [<c054e44c>] (clk_core_set_rate_nolock+0x44/0xac)
	[<c054e44c>] (clk_core_set_rate_nolock) from [<c054e4d8>] (clk_set_rate+0x24/0x34)
	[<c054e4d8>] (clk_set_rate) from [<c0512460>] (tegra124_cpufreq_probe+0x120/0x230)
	[<c0512460>] (tegra124_cpufreq_probe) from [<c03b9cbc>] (platform_drv_probe+0x44/0xac)
	[<c03b9cbc>] (platform_drv_probe) from [<c03b84c8>] (driver_probe_device+0x218/0x304)
	[<c03b84c8>] (driver_probe_device) from [<c03b69b0>] (bus_for_each_drv+0x60/0x94)
	[<c03b69b0>] (bus_for_each_drv) from [<c03b8228>] (__device_attach+0xb4/0x118)
	ata1: SATA link down (SStatus 0 SControl 300)
	[<c03b8228>] (__device_attach) from [<c03b77c8>] (bus_probe_device+0x88/0x90)
	[<c03b77c8>] (bus_probe_device) from [<c03b7be8>] (deferred_probe_work_func+0x58/0x8c)
	[<c03b7be8>] (deferred_probe_work_func) from [<c0040dfc>] (process_one_work+0x188/0x4bc)
	[<c0040dfc>] (process_one_work) from [<c004117c>] (worker_thread+0x4c/0x4f4)
	[<c004117c>] (worker_thread) from [<c0047230>] (kthread+0xe4/0xf8)
	[<c0047230>] (kthread) from [<c000f7d0>] (ret_from_fork+0x14/0x24)

Signed-off-by: Thierry Reding <treding@nvidia.com>
Fixes: c4fe70ada4 ("clk: tegra: Add closed loop support for the DFLL")
[vince.h@nvidia.com: Unlock rcu on error path]
Signed-off-by: Vince Hsu <vince.h@nvidia.com>
[sboyd@codeaurora.org: Dropped second hunk that nested the rcu
read lock unnecessarily]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-09-16 15:16:03 -07:00
..
clk-audio-sync.c clk: tegra: add Tegra specific clocks 2013-01-28 11:19:07 -07:00
clk-dfll.c clk: tegra: dfll: Properly protect OPP list 2015-09-16 15:16:03 -07:00
clk-dfll.h clk: tegra: Add Tegra124 DFLL clocksource platform driver 2015-07-16 10:39:45 +02:00
clk-divider.c clk: tegra: Properly include clk.h 2015-07-20 11:11:17 -07:00
clk-emc.c clk: tegra: Convert to clk_hw based provider APIs 2015-08-24 16:48:57 -07:00
clk-id.h clk: tegra: Define PLLD_DSI and remove dsia(b)_mux 2015-02-02 16:22:34 +02:00
clk-periph-gate.c clk: tegra: Properly include clk.h 2015-07-20 11:11:17 -07:00
clk-periph.c clk: tegra: Properly include clk.h 2015-07-20 11:11:17 -07:00
clk-pll-out.c clk: tegra: Properly include clk.h 2015-07-20 11:11:17 -07:00
clk-pll.c clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw) 2015-08-24 16:49:12 -07:00
clk-super.c clk: tegra: Properly include clk.h 2015-07-20 11:11:17 -07:00
clk-tegra20.c clk: tegra: Properly include clk.h 2015-07-20 11:11:17 -07:00
clk-tegra30.c clk: tegra: Properly include clk.h 2015-07-20 11:11:17 -07:00
clk-tegra114.c clk: tegra: Properly include clk.h 2015-07-20 11:11:17 -07:00
clk-tegra124-dfll-fcpu.c clk: tegra: Add Tegra124 DFLL clocksource platform driver 2015-07-16 10:39:45 +02:00
clk-tegra124.c clk: tegra: Fix some static checker problems 2015-08-25 16:03:42 -07:00
clk-tegra-audio.c clk: tegra: Properly include clk.h 2015-07-20 11:11:17 -07:00
clk-tegra-fixed.c clk: tegra: Properly include clk.h 2015-07-20 11:11:17 -07:00
clk-tegra-periph.c clk: tegra: Properly include clk.h 2015-07-20 11:11:17 -07:00
clk-tegra-pmc.c clk: tegra: Properly include clk.h 2015-07-20 11:11:17 -07:00
clk-tegra-super-gen4.c clk: tegra: Changes for v4.3-rc1 2015-08-25 15:55:28 -07:00
clk.c clk: tegra: Changes for v4.3-rc1 2015-08-25 15:55:28 -07:00
clk.h clk: tegra: Introduce ability for SoC-specific reset control callbacks 2015-07-16 09:32:47 +02:00
cvb.c clk: tegra: Add functions for parsing CVB tables 2015-07-16 09:32:47 +02:00
cvb.h clk: tegra: Add functions for parsing CVB tables 2015-07-16 09:32:47 +02:00
Kconfig clk: tegra: EMC clock driver depends on EMC driver 2015-05-13 15:17:13 +02:00
Makefile clk: tegra: Add Tegra124 DFLL clocksource platform driver 2015-07-16 10:39:45 +02:00