mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-29 21:16:40 +07:00
d480ace08d
Add a framebuffer driver for Qualcomm MSM/QSD SoCs, tested on HTC Dream smartphone (aka T-Mobile G1, aka ADP1). Brian said: I did the original quick and dirty version for bringup. Rebecca took over and (re)wrote the bulk of the driver, getting things stable for production ship of Dream and Sapphire, and Dima is currently adding support for later Qualcomm chipsets (QSD8x50, etc). Signed-off-by: Pavel Machek <pavel@ucw.cz> Cc: Brian Swetland <swetland@google.com> Cc: Krzysztof Helt <krzysztof.h1@poczta.fm> Cc: Rebecca Schultz Zavin <rebecca@android.com> Cc: Dima Zavin <dima@android.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
829 lines
22 KiB
C
829 lines
22 KiB
C
/*
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* MSM MDDI Transport
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*
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* Copyright (C) 2007 Google Incorporated
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* Copyright (C) 2007 QUALCOMM Incorporated
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/dma-mapping.h>
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#include <linux/interrupt.h>
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#include <linux/platform_device.h>
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#include <linux/delay.h>
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#include <linux/spinlock.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <mach/msm_iomap.h>
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#include <mach/irqs.h>
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#include <mach/board.h>
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#include <linux/delay.h>
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#include <mach/msm_fb.h>
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#include "mddi_hw.h"
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#define FLAG_DISABLE_HIBERNATION 0x0001
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#define FLAG_HAVE_CAPS 0x0002
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#define FLAG_HAS_VSYNC_IRQ 0x0004
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#define FLAG_HAVE_STATUS 0x0008
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#define CMD_GET_CLIENT_CAP 0x0601
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#define CMD_GET_CLIENT_STATUS 0x0602
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union mddi_rev {
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unsigned char raw[MDDI_REV_BUFFER_SIZE];
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struct mddi_rev_packet hdr;
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struct mddi_client_status status;
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struct mddi_client_caps caps;
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struct mddi_register_access reg;
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};
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struct reg_read_info {
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struct completion done;
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uint32_t reg;
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uint32_t status;
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uint32_t result;
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};
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struct mddi_info {
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uint16_t flags;
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uint16_t version;
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char __iomem *base;
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int irq;
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struct clk *clk;
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struct msm_mddi_client_data client_data;
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/* buffer for rev encap packets */
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void *rev_data;
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dma_addr_t rev_addr;
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struct mddi_llentry *reg_write_data;
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dma_addr_t reg_write_addr;
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struct mddi_llentry *reg_read_data;
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dma_addr_t reg_read_addr;
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size_t rev_data_curr;
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spinlock_t int_lock;
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uint32_t int_enable;
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uint32_t got_int;
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wait_queue_head_t int_wait;
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struct mutex reg_write_lock;
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struct mutex reg_read_lock;
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struct reg_read_info *reg_read;
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struct mddi_client_caps caps;
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struct mddi_client_status status;
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void (*power_client)(struct msm_mddi_client_data *, int);
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/* client device published to bind us to the
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* appropriate mddi_client driver
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*/
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char client_name[20];
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struct platform_device client_pdev;
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};
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static void mddi_init_rev_encap(struct mddi_info *mddi);
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#define mddi_readl(r) readl(mddi->base + (MDDI_##r))
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#define mddi_writel(v, r) writel((v), mddi->base + (MDDI_##r))
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void mddi_activate_link(struct msm_mddi_client_data *cdata)
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{
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struct mddi_info *mddi = container_of(cdata, struct mddi_info,
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client_data);
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mddi_writel(MDDI_CMD_LINK_ACTIVE, CMD);
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}
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static void mddi_handle_link_list_done(struct mddi_info *mddi)
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{
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}
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static void mddi_reset_rev_encap_ptr(struct mddi_info *mddi)
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{
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printk(KERN_INFO "mddi: resetting rev ptr\n");
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mddi->rev_data_curr = 0;
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mddi_writel(mddi->rev_addr, REV_PTR);
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mddi_writel(mddi->rev_addr, REV_PTR);
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mddi_writel(MDDI_CMD_FORCE_NEW_REV_PTR, CMD);
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}
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static void mddi_handle_rev_data(struct mddi_info *mddi, union mddi_rev *rev)
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{
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int i;
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struct reg_read_info *ri;
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if ((rev->hdr.length <= MDDI_REV_BUFFER_SIZE - 2) &&
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(rev->hdr.length >= sizeof(struct mddi_rev_packet) - 2)) {
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switch (rev->hdr.type) {
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case TYPE_CLIENT_CAPS:
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memcpy(&mddi->caps, &rev->caps,
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sizeof(struct mddi_client_caps));
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mddi->flags |= FLAG_HAVE_CAPS;
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wake_up(&mddi->int_wait);
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break;
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case TYPE_CLIENT_STATUS:
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memcpy(&mddi->status, &rev->status,
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sizeof(struct mddi_client_status));
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mddi->flags |= FLAG_HAVE_STATUS;
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wake_up(&mddi->int_wait);
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break;
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case TYPE_REGISTER_ACCESS:
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ri = mddi->reg_read;
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if (ri == 0) {
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printk(KERN_INFO "rev: got reg %x = %x without "
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" pending read\n",
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rev->reg.register_address,
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rev->reg.register_data_list);
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break;
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}
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if (ri->reg != rev->reg.register_address) {
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printk(KERN_INFO "rev: got reg %x = %x for "
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"wrong register, expected "
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"%x\n",
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rev->reg.register_address,
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rev->reg.register_data_list, ri->reg);
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break;
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}
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mddi->reg_read = NULL;
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ri->status = 0;
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ri->result = rev->reg.register_data_list;
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complete(&ri->done);
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break;
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default:
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printk(KERN_INFO "rev: unknown reverse packet: "
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"len=%04x type=%04x CURR_REV_PTR=%x\n",
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rev->hdr.length, rev->hdr.type,
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mddi_readl(CURR_REV_PTR));
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for (i = 0; i < rev->hdr.length + 2; i++) {
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if ((i % 16) == 0)
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printk(KERN_INFO "\n");
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printk(KERN_INFO " %02x", rev->raw[i]);
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}
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printk(KERN_INFO "\n");
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mddi_reset_rev_encap_ptr(mddi);
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}
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} else {
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printk(KERN_INFO "bad rev length, %d, CURR_REV_PTR %x\n",
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rev->hdr.length, mddi_readl(CURR_REV_PTR));
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mddi_reset_rev_encap_ptr(mddi);
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}
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}
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static void mddi_wait_interrupt(struct mddi_info *mddi, uint32_t intmask);
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static void mddi_handle_rev_data_avail(struct mddi_info *mddi)
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{
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union mddi_rev *rev = mddi->rev_data;
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uint32_t rev_data_count;
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uint32_t rev_crc_err_count;
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int i;
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struct reg_read_info *ri;
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size_t prev_offset;
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uint16_t length;
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union mddi_rev *crev = mddi->rev_data + mddi->rev_data_curr;
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/* clear the interrupt */
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mddi_writel(MDDI_INT_REV_DATA_AVAIL, INT);
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rev_data_count = mddi_readl(REV_PKT_CNT);
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rev_crc_err_count = mddi_readl(REV_CRC_ERR);
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if (rev_data_count > 1)
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printk(KERN_INFO "rev_data_count %d\n", rev_data_count);
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if (rev_crc_err_count) {
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printk(KERN_INFO "rev_crc_err_count %d, INT %x\n",
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rev_crc_err_count, mddi_readl(INT));
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ri = mddi->reg_read;
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if (ri == 0) {
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printk(KERN_INFO "rev: got crc error without pending "
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"read\n");
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} else {
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mddi->reg_read = NULL;
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ri->status = -EIO;
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ri->result = -1;
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complete(&ri->done);
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}
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}
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if (rev_data_count == 0)
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return;
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prev_offset = mddi->rev_data_curr;
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length = *((uint8_t *)mddi->rev_data + mddi->rev_data_curr);
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mddi->rev_data_curr++;
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if (mddi->rev_data_curr == MDDI_REV_BUFFER_SIZE)
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mddi->rev_data_curr = 0;
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length += *((uint8_t *)mddi->rev_data + mddi->rev_data_curr) << 8;
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mddi->rev_data_curr += 1 + length;
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if (mddi->rev_data_curr >= MDDI_REV_BUFFER_SIZE)
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mddi->rev_data_curr =
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mddi->rev_data_curr % MDDI_REV_BUFFER_SIZE;
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if (length > MDDI_REV_BUFFER_SIZE - 2) {
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printk(KERN_INFO "mddi: rev data length greater than buffer"
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"size\n");
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mddi_reset_rev_encap_ptr(mddi);
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return;
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}
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if (prev_offset + 2 + length >= MDDI_REV_BUFFER_SIZE) {
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union mddi_rev tmprev;
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size_t rem = MDDI_REV_BUFFER_SIZE - prev_offset;
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memcpy(&tmprev.raw[0], mddi->rev_data + prev_offset, rem);
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memcpy(&tmprev.raw[rem], mddi->rev_data, 2 + length - rem);
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mddi_handle_rev_data(mddi, &tmprev);
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} else {
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mddi_handle_rev_data(mddi, crev);
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}
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if (prev_offset < MDDI_REV_BUFFER_SIZE / 2 &&
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mddi->rev_data_curr >= MDDI_REV_BUFFER_SIZE / 2) {
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mddi_writel(mddi->rev_addr, REV_PTR);
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}
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}
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static irqreturn_t mddi_isr(int irq, void *data)
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{
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struct msm_mddi_client_data *cdata = data;
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struct mddi_info *mddi = container_of(cdata, struct mddi_info,
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client_data);
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uint32_t active, status;
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spin_lock(&mddi->int_lock);
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active = mddi_readl(INT);
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status = mddi_readl(STAT);
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mddi_writel(active, INT);
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/* ignore any interrupts we have disabled */
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active &= mddi->int_enable;
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mddi->got_int |= active;
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wake_up(&mddi->int_wait);
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if (active & MDDI_INT_PRI_LINK_LIST_DONE) {
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mddi->int_enable &= (~MDDI_INT_PRI_LINK_LIST_DONE);
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mddi_handle_link_list_done(mddi);
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}
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if (active & MDDI_INT_REV_DATA_AVAIL)
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mddi_handle_rev_data_avail(mddi);
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if (active & ~MDDI_INT_NEED_CLEAR)
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mddi->int_enable &= ~(active & ~MDDI_INT_NEED_CLEAR);
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if (active & MDDI_INT_LINK_ACTIVE) {
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mddi->int_enable &= (~MDDI_INT_LINK_ACTIVE);
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mddi->int_enable |= MDDI_INT_IN_HIBERNATION;
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}
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if (active & MDDI_INT_IN_HIBERNATION) {
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mddi->int_enable &= (~MDDI_INT_IN_HIBERNATION);
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mddi->int_enable |= MDDI_INT_LINK_ACTIVE;
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}
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mddi_writel(mddi->int_enable, INTEN);
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spin_unlock(&mddi->int_lock);
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return IRQ_HANDLED;
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}
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static long mddi_wait_interrupt_timeout(struct mddi_info *mddi,
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uint32_t intmask, int timeout)
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{
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unsigned long irq_flags;
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spin_lock_irqsave(&mddi->int_lock, irq_flags);
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mddi->got_int &= ~intmask;
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mddi->int_enable |= intmask;
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mddi_writel(mddi->int_enable, INTEN);
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spin_unlock_irqrestore(&mddi->int_lock, irq_flags);
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return wait_event_timeout(mddi->int_wait, mddi->got_int & intmask,
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timeout);
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}
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static void mddi_wait_interrupt(struct mddi_info *mddi, uint32_t intmask)
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{
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if (mddi_wait_interrupt_timeout(mddi, intmask, HZ/10) == 0)
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printk(KERN_INFO KERN_ERR "mddi_wait_interrupt %d, timeout "
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"waiting for %x, INT = %x, STAT = %x gotint = %x\n",
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current->pid, intmask, mddi_readl(INT), mddi_readl(STAT),
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mddi->got_int);
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}
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static void mddi_init_rev_encap(struct mddi_info *mddi)
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{
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memset(mddi->rev_data, 0xee, MDDI_REV_BUFFER_SIZE);
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mddi_writel(mddi->rev_addr, REV_PTR);
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mddi_writel(MDDI_CMD_FORCE_NEW_REV_PTR, CMD);
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mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND);
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}
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void mddi_set_auto_hibernate(struct msm_mddi_client_data *cdata, int on)
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{
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struct mddi_info *mddi = container_of(cdata, struct mddi_info,
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client_data);
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mddi_writel(MDDI_CMD_POWERDOWN, CMD);
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mddi_wait_interrupt(mddi, MDDI_INT_IN_HIBERNATION);
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mddi_writel(MDDI_CMD_HIBERNATE | !!on, CMD);
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mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND);
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}
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static uint16_t mddi_init_registers(struct mddi_info *mddi)
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{
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mddi_writel(0x0001, VERSION);
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mddi_writel(MDDI_HOST_BYTES_PER_SUBFRAME, BPS);
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mddi_writel(0x0003, SPM); /* subframes per media */
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mddi_writel(0x0005, TA1_LEN);
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mddi_writel(MDDI_HOST_TA2_LEN, TA2_LEN);
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mddi_writel(0x0096, DRIVE_HI);
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/* 0x32 normal, 0x50 for Toshiba display */
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mddi_writel(0x0050, DRIVE_LO);
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mddi_writel(0x003C, DISP_WAKE); /* wakeup counter */
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mddi_writel(MDDI_HOST_REV_RATE_DIV, REV_RATE_DIV);
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mddi_writel(MDDI_REV_BUFFER_SIZE, REV_SIZE);
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mddi_writel(MDDI_MAX_REV_PKT_SIZE, REV_ENCAP_SZ);
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/* disable periodic rev encap */
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mddi_writel(MDDI_CMD_PERIODIC_REV_ENCAP, CMD);
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mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND);
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if (mddi_readl(PAD_CTL) == 0) {
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/* If we are turning on band gap, need to wait 5us before
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* turning on the rest of the PAD */
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mddi_writel(0x08000, PAD_CTL);
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udelay(5);
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}
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/* Recommendation from PAD hw team */
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mddi_writel(0xa850f, PAD_CTL);
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/* Need an even number for counts */
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mddi_writel(0x60006, DRIVER_START_CNT);
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mddi_set_auto_hibernate(&mddi->client_data, 0);
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mddi_writel(MDDI_CMD_DISP_IGNORE, CMD);
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mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND);
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mddi_init_rev_encap(mddi);
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return mddi_readl(CORE_VER) & 0xffff;
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}
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static void mddi_suspend(struct msm_mddi_client_data *cdata)
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{
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struct mddi_info *mddi = container_of(cdata, struct mddi_info,
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client_data);
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/* turn off the client */
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if (mddi->power_client)
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mddi->power_client(&mddi->client_data, 0);
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/* turn off the link */
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mddi_writel(MDDI_CMD_RESET, CMD);
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mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND);
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/* turn off the clock */
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clk_disable(mddi->clk);
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}
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static void mddi_resume(struct msm_mddi_client_data *cdata)
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{
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struct mddi_info *mddi = container_of(cdata, struct mddi_info,
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client_data);
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mddi_set_auto_hibernate(&mddi->client_data, 0);
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/* turn on the client */
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if (mddi->power_client)
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mddi->power_client(&mddi->client_data, 1);
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/* turn on the clock */
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clk_enable(mddi->clk);
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/* set up the local registers */
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mddi->rev_data_curr = 0;
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mddi_init_registers(mddi);
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mddi_writel(mddi->int_enable, INTEN);
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mddi_writel(MDDI_CMD_LINK_ACTIVE, CMD);
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mddi_writel(MDDI_CMD_SEND_RTD, CMD);
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mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND);
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mddi_set_auto_hibernate(&mddi->client_data, 1);
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}
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static int __init mddi_get_client_caps(struct mddi_info *mddi)
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{
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int i, j;
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/* clear any stale interrupts */
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mddi_writel(0xffffffff, INT);
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mddi->int_enable = MDDI_INT_LINK_ACTIVE |
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MDDI_INT_IN_HIBERNATION |
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MDDI_INT_PRI_LINK_LIST_DONE |
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MDDI_INT_REV_DATA_AVAIL |
|
|
MDDI_INT_REV_OVERFLOW |
|
|
MDDI_INT_REV_OVERWRITE |
|
|
MDDI_INT_RTD_FAILURE;
|
|
mddi_writel(mddi->int_enable, INTEN);
|
|
|
|
mddi_writel(MDDI_CMD_LINK_ACTIVE, CMD);
|
|
mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND);
|
|
|
|
for (j = 0; j < 3; j++) {
|
|
/* the toshiba vga panel does not respond to get
|
|
* caps unless you SEND_RTD, but the first SEND_RTD
|
|
* will fail...
|
|
*/
|
|
for (i = 0; i < 4; i++) {
|
|
uint32_t stat;
|
|
|
|
mddi_writel(MDDI_CMD_SEND_RTD, CMD);
|
|
mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND);
|
|
stat = mddi_readl(STAT);
|
|
printk(KERN_INFO "mddi cmd send rtd: int %x, stat %x, "
|
|
"rtd val %x\n", mddi_readl(INT), stat,
|
|
mddi_readl(RTD_VAL));
|
|
if ((stat & MDDI_STAT_RTD_MEAS_FAIL) == 0)
|
|
break;
|
|
msleep(1);
|
|
}
|
|
|
|
mddi_writel(CMD_GET_CLIENT_CAP, CMD);
|
|
mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND);
|
|
wait_event_timeout(mddi->int_wait, mddi->flags & FLAG_HAVE_CAPS,
|
|
HZ / 100);
|
|
|
|
if (mddi->flags & FLAG_HAVE_CAPS)
|
|
break;
|
|
printk(KERN_INFO KERN_ERR "mddi_init, timeout waiting for "
|
|
"caps\n");
|
|
}
|
|
return mddi->flags & FLAG_HAVE_CAPS;
|
|
}
|
|
|
|
/* link must be active when this is called */
|
|
int mddi_check_status(struct mddi_info *mddi)
|
|
{
|
|
int ret = -1, retry = 3;
|
|
mutex_lock(&mddi->reg_read_lock);
|
|
mddi_writel(MDDI_CMD_PERIODIC_REV_ENCAP | 1, CMD);
|
|
mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND);
|
|
|
|
do {
|
|
mddi->flags &= ~FLAG_HAVE_STATUS;
|
|
mddi_writel(CMD_GET_CLIENT_STATUS, CMD);
|
|
mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND);
|
|
wait_event_timeout(mddi->int_wait,
|
|
mddi->flags & FLAG_HAVE_STATUS,
|
|
HZ / 100);
|
|
|
|
if (mddi->flags & FLAG_HAVE_STATUS) {
|
|
if (mddi->status.crc_error_count)
|
|
printk(KERN_INFO "mddi status: crc_error "
|
|
"count: %d\n",
|
|
mddi->status.crc_error_count);
|
|
else
|
|
ret = 0;
|
|
break;
|
|
} else
|
|
printk(KERN_INFO "mddi status: failed to get client "
|
|
"status\n");
|
|
mddi_writel(MDDI_CMD_SEND_RTD, CMD);
|
|
mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND);
|
|
} while (--retry);
|
|
|
|
mddi_writel(MDDI_CMD_PERIODIC_REV_ENCAP | 0, CMD);
|
|
mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND);
|
|
mutex_unlock(&mddi->reg_read_lock);
|
|
return ret;
|
|
}
|
|
|
|
|
|
void mddi_remote_write(struct msm_mddi_client_data *cdata, uint32_t val,
|
|
uint32_t reg)
|
|
{
|
|
struct mddi_info *mddi = container_of(cdata, struct mddi_info,
|
|
client_data);
|
|
struct mddi_llentry *ll;
|
|
struct mddi_register_access *ra;
|
|
|
|
mutex_lock(&mddi->reg_write_lock);
|
|
|
|
ll = mddi->reg_write_data;
|
|
|
|
ra = &(ll->u.r);
|
|
ra->length = 14 + 4;
|
|
ra->type = TYPE_REGISTER_ACCESS;
|
|
ra->client_id = 0;
|
|
ra->read_write_info = MDDI_WRITE | 1;
|
|
ra->crc16 = 0;
|
|
|
|
ra->register_address = reg;
|
|
ra->register_data_list = val;
|
|
|
|
ll->flags = 1;
|
|
ll->header_count = 14;
|
|
ll->data_count = 4;
|
|
ll->data = mddi->reg_write_addr + offsetof(struct mddi_llentry,
|
|
u.r.register_data_list);
|
|
ll->next = 0;
|
|
ll->reserved = 0;
|
|
|
|
mddi_writel(mddi->reg_write_addr, PRI_PTR);
|
|
|
|
mddi_wait_interrupt(mddi, MDDI_INT_PRI_LINK_LIST_DONE);
|
|
mutex_unlock(&mddi->reg_write_lock);
|
|
}
|
|
|
|
uint32_t mddi_remote_read(struct msm_mddi_client_data *cdata, uint32_t reg)
|
|
{
|
|
struct mddi_info *mddi = container_of(cdata, struct mddi_info,
|
|
client_data);
|
|
struct mddi_llentry *ll;
|
|
struct mddi_register_access *ra;
|
|
struct reg_read_info ri;
|
|
unsigned s;
|
|
int retry_count = 2;
|
|
unsigned long irq_flags;
|
|
|
|
mutex_lock(&mddi->reg_read_lock);
|
|
|
|
ll = mddi->reg_read_data;
|
|
|
|
ra = &(ll->u.r);
|
|
ra->length = 14;
|
|
ra->type = TYPE_REGISTER_ACCESS;
|
|
ra->client_id = 0;
|
|
ra->read_write_info = MDDI_READ | 1;
|
|
ra->crc16 = 0;
|
|
|
|
ra->register_address = reg;
|
|
|
|
ll->flags = 0x11;
|
|
ll->header_count = 14;
|
|
ll->data_count = 0;
|
|
ll->data = 0;
|
|
ll->next = 0;
|
|
ll->reserved = 0;
|
|
|
|
s = mddi_readl(STAT);
|
|
|
|
ri.reg = reg;
|
|
ri.status = -1;
|
|
|
|
do {
|
|
init_completion(&ri.done);
|
|
mddi->reg_read = &ri;
|
|
mddi_writel(mddi->reg_read_addr, PRI_PTR);
|
|
|
|
mddi_wait_interrupt(mddi, MDDI_INT_PRI_LINK_LIST_DONE);
|
|
|
|
/* Enable Periodic Reverse Encapsulation. */
|
|
mddi_writel(MDDI_CMD_PERIODIC_REV_ENCAP | 1, CMD);
|
|
mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND);
|
|
if (wait_for_completion_timeout(&ri.done, HZ/10) == 0 &&
|
|
!ri.done.done) {
|
|
printk(KERN_INFO "mddi_remote_read(%x) timeout "
|
|
"(%d %d %d)\n",
|
|
reg, ri.status, ri.result, ri.done.done);
|
|
spin_lock_irqsave(&mddi->int_lock, irq_flags);
|
|
mddi->reg_read = NULL;
|
|
spin_unlock_irqrestore(&mddi->int_lock, irq_flags);
|
|
ri.status = -1;
|
|
ri.result = -1;
|
|
}
|
|
if (ri.status == 0)
|
|
break;
|
|
|
|
mddi_writel(MDDI_CMD_SEND_RTD, CMD);
|
|
mddi_writel(MDDI_CMD_LINK_ACTIVE, CMD);
|
|
mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND);
|
|
printk(KERN_INFO "mddi_remote_read: failed, sent "
|
|
"MDDI_CMD_SEND_RTD: int %x, stat %x, rtd val %x "
|
|
"curr_rev_ptr %x\n", mddi_readl(INT), mddi_readl(STAT),
|
|
mddi_readl(RTD_VAL), mddi_readl(CURR_REV_PTR));
|
|
} while (retry_count-- > 0);
|
|
/* Disable Periodic Reverse Encapsulation. */
|
|
mddi_writel(MDDI_CMD_PERIODIC_REV_ENCAP | 0, CMD);
|
|
mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND);
|
|
mddi->reg_read = NULL;
|
|
mutex_unlock(&mddi->reg_read_lock);
|
|
return ri.result;
|
|
}
|
|
|
|
static struct mddi_info mddi_info[2];
|
|
|
|
static int __init mddi_clk_setup(struct platform_device *pdev,
|
|
struct mddi_info *mddi,
|
|
unsigned long clk_rate)
|
|
{
|
|
int ret;
|
|
|
|
/* set up the clocks */
|
|
mddi->clk = clk_get(&pdev->dev, "mddi_clk");
|
|
if (IS_ERR(mddi->clk)) {
|
|
printk(KERN_INFO "mddi: failed to get clock\n");
|
|
return PTR_ERR(mddi->clk);
|
|
}
|
|
ret = clk_enable(mddi->clk);
|
|
if (ret)
|
|
goto fail;
|
|
ret = clk_set_rate(mddi->clk, clk_rate);
|
|
if (ret)
|
|
goto fail;
|
|
return 0;
|
|
|
|
fail:
|
|
clk_put(mddi->clk);
|
|
return ret;
|
|
}
|
|
|
|
static int __init mddi_rev_data_setup(struct mddi_info *mddi)
|
|
{
|
|
void *dma;
|
|
dma_addr_t dma_addr;
|
|
|
|
/* set up dma buffer */
|
|
dma = dma_alloc_coherent(NULL, 0x1000, &dma_addr, GFP_KERNEL);
|
|
if (dma == 0)
|
|
return -ENOMEM;
|
|
mddi->rev_data = dma;
|
|
mddi->rev_data_curr = 0;
|
|
mddi->rev_addr = dma_addr;
|
|
mddi->reg_write_data = dma + MDDI_REV_BUFFER_SIZE;
|
|
mddi->reg_write_addr = dma_addr + MDDI_REV_BUFFER_SIZE;
|
|
mddi->reg_read_data = mddi->reg_write_data + 1;
|
|
mddi->reg_read_addr = mddi->reg_write_addr +
|
|
sizeof(*mddi->reg_write_data);
|
|
return 0;
|
|
}
|
|
|
|
static int __init mddi_probe(struct platform_device *pdev)
|
|
{
|
|
struct msm_mddi_platform_data *pdata = pdev->dev.platform_data;
|
|
struct mddi_info *mddi = &mddi_info[pdev->id];
|
|
struct resource *resource;
|
|
int ret, i;
|
|
|
|
resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
if (!resource) {
|
|
printk(KERN_ERR "mddi: no associated mem resource!\n");
|
|
return -ENOMEM;
|
|
}
|
|
mddi->base = ioremap(resource->start, resource->end - resource->start);
|
|
if (!mddi->base) {
|
|
printk(KERN_ERR "mddi: failed to remap base!\n");
|
|
ret = -EINVAL;
|
|
goto error_ioremap;
|
|
}
|
|
resource = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
|
|
if (!resource) {
|
|
printk(KERN_ERR "mddi: no associated irq resource!\n");
|
|
ret = -EINVAL;
|
|
goto error_get_irq_resource;
|
|
}
|
|
mddi->irq = resource->start;
|
|
printk(KERN_INFO "mddi: init() base=0x%p irq=%d\n", mddi->base,
|
|
mddi->irq);
|
|
mddi->power_client = pdata->power_client;
|
|
|
|
mutex_init(&mddi->reg_write_lock);
|
|
mutex_init(&mddi->reg_read_lock);
|
|
spin_lock_init(&mddi->int_lock);
|
|
init_waitqueue_head(&mddi->int_wait);
|
|
|
|
ret = mddi_clk_setup(pdev, mddi, pdata->clk_rate);
|
|
if (ret) {
|
|
printk(KERN_ERR "mddi: failed to setup clock!\n");
|
|
goto error_clk_setup;
|
|
}
|
|
|
|
ret = mddi_rev_data_setup(mddi);
|
|
if (ret) {
|
|
printk(KERN_ERR "mddi: failed to setup rev data!\n");
|
|
goto error_rev_data;
|
|
}
|
|
|
|
mddi->int_enable = 0;
|
|
mddi_writel(mddi->int_enable, INTEN);
|
|
ret = request_irq(mddi->irq, mddi_isr, IRQF_DISABLED, "mddi",
|
|
&mddi->client_data);
|
|
if (ret) {
|
|
printk(KERN_ERR "mddi: failed to request enable irq!\n");
|
|
goto error_request_irq;
|
|
}
|
|
|
|
/* turn on the mddi client bridge chip */
|
|
if (mddi->power_client)
|
|
mddi->power_client(&mddi->client_data, 1);
|
|
|
|
/* initialize the mddi registers */
|
|
mddi_set_auto_hibernate(&mddi->client_data, 0);
|
|
mddi_writel(MDDI_CMD_RESET, CMD);
|
|
mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND);
|
|
mddi->version = mddi_init_registers(mddi);
|
|
if (mddi->version < 0x20) {
|
|
printk(KERN_ERR "mddi: unsupported version 0x%x\n",
|
|
mddi->version);
|
|
ret = -ENODEV;
|
|
goto error_mddi_version;
|
|
}
|
|
|
|
/* read the capabilities off the client */
|
|
if (!mddi_get_client_caps(mddi)) {
|
|
printk(KERN_INFO "mddi: no client found\n");
|
|
/* power down the panel */
|
|
mddi_writel(MDDI_CMD_POWERDOWN, CMD);
|
|
printk(KERN_INFO "mddi powerdown: stat %x\n", mddi_readl(STAT));
|
|
msleep(100);
|
|
printk(KERN_INFO "mddi powerdown: stat %x\n", mddi_readl(STAT));
|
|
return 0;
|
|
}
|
|
mddi_set_auto_hibernate(&mddi->client_data, 1);
|
|
|
|
if (mddi->caps.Mfr_Name == 0 && mddi->caps.Product_Code == 0)
|
|
pdata->fixup(&mddi->caps.Mfr_Name, &mddi->caps.Product_Code);
|
|
|
|
mddi->client_pdev.id = 0;
|
|
for (i = 0; i < pdata->num_clients; i++) {
|
|
if (pdata->client_platform_data[i].product_id ==
|
|
(mddi->caps.Mfr_Name << 16 | mddi->caps.Product_Code)) {
|
|
mddi->client_data.private_client_data =
|
|
pdata->client_platform_data[i].client_data;
|
|
mddi->client_pdev.name =
|
|
pdata->client_platform_data[i].name;
|
|
mddi->client_pdev.id =
|
|
pdata->client_platform_data[i].id;
|
|
/* XXX: possibly set clock */
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (i >= pdata->num_clients)
|
|
mddi->client_pdev.name = "mddi_c_dummy";
|
|
printk(KERN_INFO "mddi: registering panel %s\n",
|
|
mddi->client_pdev.name);
|
|
|
|
mddi->client_data.suspend = mddi_suspend;
|
|
mddi->client_data.resume = mddi_resume;
|
|
mddi->client_data.activate_link = mddi_activate_link;
|
|
mddi->client_data.remote_write = mddi_remote_write;
|
|
mddi->client_data.remote_read = mddi_remote_read;
|
|
mddi->client_data.auto_hibernate = mddi_set_auto_hibernate;
|
|
mddi->client_data.fb_resource = pdata->fb_resource;
|
|
if (pdev->id == 0)
|
|
mddi->client_data.interface_type = MSM_MDDI_PMDH_INTERFACE;
|
|
else if (pdev->id == 1)
|
|
mddi->client_data.interface_type = MSM_MDDI_EMDH_INTERFACE;
|
|
else {
|
|
printk(KERN_ERR "mddi: can not determine interface %d!\n",
|
|
pdev->id);
|
|
ret = -EINVAL;
|
|
goto error_mddi_interface;
|
|
}
|
|
|
|
mddi->client_pdev.dev.platform_data = &mddi->client_data;
|
|
printk(KERN_INFO "mddi: publish: %s\n", mddi->client_name);
|
|
platform_device_register(&mddi->client_pdev);
|
|
return 0;
|
|
|
|
error_mddi_interface:
|
|
error_mddi_version:
|
|
free_irq(mddi->irq, 0);
|
|
error_request_irq:
|
|
dma_free_coherent(NULL, 0x1000, mddi->rev_data, mddi->rev_addr);
|
|
error_rev_data:
|
|
error_clk_setup:
|
|
error_get_irq_resource:
|
|
iounmap(mddi->base);
|
|
error_ioremap:
|
|
|
|
printk(KERN_INFO "mddi: mddi_init() failed (%d)\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
|
|
static struct platform_driver mddi_driver = {
|
|
.probe = mddi_probe,
|
|
.driver = { .name = "msm_mddi" },
|
|
};
|
|
|
|
static int __init _mddi_init(void)
|
|
{
|
|
return platform_driver_register(&mddi_driver);
|
|
}
|
|
|
|
module_init(_mddi_init);
|